Papers by Author: Gerhard Pensl

Abstract: Aluminum-doped 4H-SiC samples were either irradiated with high-energy electrons (170 keV or 1 MeV) or implanted with a box-shaped He+-profile. Admittance spectroscopy (AS) and deep level transient spectroscopy (DLTS) were employed to search for defect centers. AS spectra of as-grown as well as of electron-irradiated (170 keV or 1 MeV) 4H-SiC epilayers reveal the Al acceptor (ΔE(Al) = 200 meV) and an unknown defect (ΔE(SB) = 177 meV), while AS spectra of the He+-implanted and annealed sample show in addition to the Al-acceptor two energetically deeper acceptor-like defect centers (ΔE(RE3) = 255 meV and ΔE(KR3) = 375 meV). The KR3-center is not directly formed by the He+-implantation, it requires an annealing process. The DLTS spectra of the He+-implanted and annealed sample resolve a double-peak structure of the KR3-defect (ΔE(KR3A) = 380 meV and ΔE(KR3B) = 410 meV).

Abstract: This paper comprises a systematic study of the thermal stability of defect centers observed in n- and p-type 4H-SiC by deep level transient spectroscopy (DLTS); the defects are generated by irradiation with high-energy electrons of 170 keV or 1 MeV.

Abstract: In this paper we describe an effort to find correlations between low temperature photoluminescence spectroscopy (LTPL) and deep level transient spectroscopy (DLTS) of electron irradiated samples annealed from 25 °C to 1700 °C in 100 °C steps. We report on thermal histories of defect centers created by 170 keV and 1 MeV electron irradiation, as observed by LTPL only. The DLTS results on "twin" samples are presented in a separate paper. Our results indicate that in n-type 4H SiC there is no correlation between the Z1/Z2 center in DLTS and the L1 peak of the DI center seen in LTPL. In p-type 4H SiC we do not find a correlation between a 350 meV DLTS peak above the valence band and the LTPL L1 peak of the DI center. Consequently, we cannot find evidence for a 350 meV ground state postulated in the “Pseudo–Donor” model [3].

Abstract: In this paper we revisit sharp low temperature luminescence lines (LTPL) previously generated by high dose 1018 to 1020 cm-2 electron beams in an electron microscope and now produced by low dose 1015 cm-2 electron, 5x1010 cm-2 proton and helium ion irradiation. New no phonon lines E0, F0, θ0, Φ0, K0, G0, J0, M0 and phonon replicas are found. Phonon replicas up to the fifth harmonic are well accounted for by theory giving convincing new evidence that the di-carbon antisite is responsible for these deep defect lines.

Abstract: A large leakage current (IR) is observed at reverse bias (VR) in 3C-SiC p+-n diodes. This leakage current is caused by a high density of stacking faults (SFs). The temperature dependence of IR is studied in the temperature range from 100 K to 295 K. It turns out that IR is thermally activated for reverse voltages VR  |170| V. We propose that within this voltage range IR originates from thermally assisted tunneling of electrons and holes from band-like states of the SFs into the conduction and valence band. For VR > |170| V, the thermal barrier is strongly reduced and direct tunneling dominates. These dependences are simulated in the framework of a simplified model.

Abstract: The correlation between leakage current and stacking fault (SF) density in p-n diodes fabricated on 3C-SiC homo-epitaxial layer is investigated. The leakage current density at reverse bias strongly depends on the SF density; an increase of one order of magnitude in the SF density enhances the leakage current by five orders of magnitude at a reverse bias of 400 V. In order to obtain commercially suitable MOSFETs with 10-4Acm-2 at 600V, the SF density has to be reduced below 6×104 cm-2. Photoemission caused by hot electrons, which travel along a leakage path, can be observed at the crossing between a SF and the edge of p-well region; where the maximum electric field is induced. The mechanism of the leakage current is discussed in detail in a separate paper.

Abstract: The authors investigated the effect of preannealing on N-/Al-coimplanted and over-oxidized Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). The preannealing process causes a decrease of the Hall mobility and the effective mobility, and an increase of the interface state density. Secondary ion mass spectroscopy (SIMS) measurements revealed that the N concentration at the SiO2/SiC interface in preannealed samples is lower than in not-preannealed samples, which might be the reason for in the increase of the interface state density. In MOSFETs without preannealing, more N atoms are piled up at the SiO2/SiC interface, leading to the lower interface state density and higher mobility.

Abstract: Two electrical measurement techniques are frequently employed for the characteri- zation of traps at the SiO2/SiC interface: the thermal dielectric relaxation current (TDRC) and the conductance method (CM). When plotting Dit as a function of the energy position Eit in the bandgap both techniques reveal comparable results for deep interface traps (EC􀀀Eit > 0:3 eV). For shallower traps, CM always shows a strong increase of Dit which originates from near interface traps (NIT). TDRC provides a contradictory result, namely a slight decrease of Dit. In this paper, we show that the position of NITs in the oxide close to the interface is responsible for the invisibility of these traps in TDRC spectra. We further show that NITs become detectable by the TDRC method by using a discharging voltage Vdis close to the accumulation regime. However, due to the Shockley-Ramo-Theorem the contribution of NITs to the Dit in TDRC spectra is strongly suppressed and can be increased by using thin oxides.

Abstract: We report on the electrical characterization of high-purity semi-insulating 4H-SiC after annealing at temperatures between room temperature and 1700 oC by current-mode deep level transient spectroscopy (I-DLTS). I-V and Hall-effect measurements revealed that the investigated substrates possess p-type conductivity. Four deep levels were detected by I-DLTS with activation energies in the 0.15-1.29 eV range. We studied their thermal stability as well as their stability with respect to light illumination.

Abstract: Conventional MOSFETs and Hall-bar MOSFETs are fabricated side by side by over-oxidation of N-implanted or N-/Al-coimplanted 4H-SiC layers. It is demonstrated that the N-/Al-coimplanted MOSFETs possess a positive threshold voltage at room temperature and reach high values of the channel mobility. The effective electron mobility and Hall mobility in Hall-bar MOSFETs are 31 cm2/Vs and 150 cm2/Vs, respectively, indicating a high density of interface traps in spite of the excellent high mobility values.