Papers by Author: Hiroyuki Matsunami

Abstract: Homoepitaxial growth of 4H-SiC and characterization of deep levels obtained mainly in the authors’ group have been reviewed. The growth rate has been increased to 24 om/h with keeping very good surface morphology and low trap concentration on 8o off-axis 4H-SiC(0001) by hot-wall chemical vapor deposition at 1650oC. The increased growth rate has resulted in the enhanced conversion of basal-plane dislocations into threading edge dislocations in epilayers. The Z1/2 and EH6/7 concentrations can be decreased to about 1·1012 cm-3 by increasing the C/Si ratio during CVD. Extensive investigation on as-grown and electron-irradiated epilayers indicates that both the Z1/2 and EH6/7 centers may be attributed to the same origin related to carbon displacement, probably a carbon vacancy. Deep levels observed in as-grown and irradiated p-type 4H-SiC are also presented.

Abstract: Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures. Annealing of deposited oxides in N2O at 1300oC significantly enhances the breakdown strength and decreases the interface state density to 3x1011 cm-2eV-1 at EC – 0.2 eV. As a result, high channel mobility of 34 cm2/Vs and 52 cm2/Vs has been attained for inversion-type MOSFETs fabricated on 4H-SiC(0001)Si and (000-1)C faces, respectively. The channel mobility shows a maximum when the increase of oxide thickness during N2O annealing is approximately 5 nm. A lateral RESURF MOSFET with gate oxides formed by the proposed process has blocked 1450 V and showed a low on-resistance of 75 m
cm2, which is one of the best performances among lateral SiC MOSFETs reported.

Abstract: It is investigated whether the homogeneous depth profiles of epitaxially doped B or Al are changed or preserved by implantation of various implanted species and annealing processes. We have found a strong decrease in the atomic B concentration in epitaxially B-doped layers after implantation of N+, Al+, and P+ and subsequent annealing at 1700 °C. On the other hand, the Al profiles in epitaxially Al-doped layers are preserved after the same processes.

Abstract: In this work, we have developed an innovative epitaxial growth process named the “Migration Enhanced Embedded Epitaxial” (ME3) growth process. It was found that at elevated growth temperatures, the epitaxial growth at the bottom of the trenches is greatly enhanced compared to growth on the sidewalls. This is attributed to the large surface diffusion length of reactant species mainly due to the higher growth temperature. In addition, it was found that this high temperature ME3 growth process is not influenced by the crystal-orientation. Similar growth behavior was observed for stripe-trench structures aligned either along the [11-20] or [1-100] directions. No difference was observed in the electrical performance of the pn diodes fabricated on either oriented stripe geometry. The ME3 process can also be used as an alternative to ion-implantation technology for selective doping process.

Abstract: 4H-SiC layers have been homoepitaxially grown on 4°off-axis (0001) and (000-1) under various conditions by horizontal hot-wall CVD. We have investigated surface morphology and background doping concentration of the epi-layers on 4°off-axis substrates. Surface morphology grown on the (0001) Si-face showed strong step bunching under C-rich conditions. On the other hand, smooth surface morphology on the (000-1) C-face could be grown in the wide C/Si ratio range at 1600 °C. Site-competition behavior is clearly observed under low-pressure growth conditions on 4°off-axis (000-1) C-face, leading to a lowest doping concentration of 4.4x1014 cm-3.

Abstract: The authors have investigated electrical behavior of implanted Al and B atoms near a “tail” region in 4H-SiC (0001) after high-temperature annealing. For aluminum-ion (Al+) implantation, slight in-diffusion of Al implants occurs in the initial stage of annealing at 1700 °C. Nearly all of implanted Al atoms, including the in-diffused Al atoms were activated by annealing at 1700 °C for 1 min. Several electrically deep centers are formed by Al+ implantation. The concentrations of the centers are 3-4 orders-of-magnitude lower than that of implanted Al-atom concentration. For boron-ion (B+) implantation, significant out- and in-diffusion of B implants occur in the initial stage of annealing at 1700 °C. Most of the in-diffused B implants work as B acceptors. A high density of B-related D center exists near the tail region. To suppress the B diffusion, a ten-times higher dose of carbon-ion (C+) co-implantation is effective. However, high concentrations of additional deep centers are introduced by such high-dose C+ co-implantation.

Abstract: Technological aspects of ion implantation in SiC device processes are described. Annealing techniques to suppress surface roughening of implanted SiC (0001) are demonstrated. Trials to achieve a low sheet resistance are described for n-type and p-type doping. Implantation into the (11-20) face is also presented. Electrical behaviors of implants near implanted tail regions are discussed based on experiments.

Abstract: Short-channel effects in SiC MOSFETs have been investigated. Planar MOSFETs with various channel lengths have been fabricated on p-type 4H-SiC (0001), (000-1) and (11-20) faces.^Short-channel effects such as punchthrough behavior, decrease of threshold voltage and deterioration of subthreshold characteristics are observed. Furthermore, the critical channel lengths below which short-channel effects occur are analyzed as a function of p-body doping and oxide thickness by using device simulation. The critical channel lengths in the fabricated SiC MOSFETs are in agreement with those obtained from the device simulation. The results are also in agreement with the empirical relationship for Si MOSFETs.

Abstract: Optimum dose designing for 4H-SiC (0001) two-zone RESURF MOSFETs is investigated by device simulation and fabrication. Simulated results suggest that negative charge at the SiC/SiO2 interface significantly influences breakdown voltage. Simulation has also showed that breakdown voltage strongly depends on LDD (Lightly-Doped Drain) dose. The dose dependencies of the breakdown voltage experimentally obtained are in good agreement with the device simulation. A RESURF MOSFET, processed by N2O oxidation, with an optimized dose blocks 1080V and has a low on-resistance of 79 mcm2 at a gate oxide field of 3.0 MV/cm, which is the best 4H-SiC RESURF MOSFET ever reported.

Abstract: Generation of stacking faults (SFs) in fast epitaxial growth of 4H-SiC(0001) has been reduced in vertical hot-wall chemical vapor deposition (CVD). 52 µm-thick epilayers with and without SFs are used to investigate impacts of SFs on the performance of Schottky barrier diodes (SBDs). The density, shape and structure of stacking faults have been characterized by cathodeluminescence (CL), photoluminescence (PL) and high-resolution transmission electron microscopy (HR-TEM). These analyses indicate that most (> 75 %) SFs with an 8H structure are generated near the epilayer/substrate interface during CVD. It is also revealed that the SFs cause the lowering of Schottky barrier height as well as the decrease of breakdown voltage.