Papers by Keyword: Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET)

Abstract: Oxidized Ta2Si layers have been used as high-k dielectric layer for 4H-SiC MOSFETs. The gate insulator was grown by dry oxidation of 40nm deposited Ta2Si during 1h at 1050oC. The dielectric constant obtained from 4H-SiC MIS capacitors is ~20 with an insulator thickness of 150nm. These devices exhibit adequate subthreshold, saturation and drive characteristics. For the MOSFETs fabricated on a p-implanted and annealed region, a peak mobility up to 45cm2/Vs has been extracted. The specific on-resistance of this device is 29mW·cm2 at room temperature with VDS=0.2V and VGS=14V.

Abstract: Thin (~10nm) Si layers have been deposited using Rapid Thermal CVD at temperatures ranging 950°C-1050°C. RTCVD deposited Si layers have been oxidized using N2O at 1300°C during relatively short times (15min) to produce SiO2 layers of 20-30nm. The interfacial characteristics of N2O oxidized RTCVD layers have been studied using the conductance method, showing a reduced traps density and a low band bending fluctuation when compared with conventional N2O grown oxides on 4H-SiC substrates. The surface topology of these layers has also been analyzed evidencing an adequate topography with low roughness.

Abstract: A high temperature rapid thermal processing (HT-RTP) above 1400oC was investigated for use in the gate oxide formation of 4H-SiC by a cold-wall oxidation furnace. The gate oxide film of ~50nm can be formed for several minutes in the oxidizing atmospheres such as N2O and O2, where the oxidation rates were 8-10nm/min. After the initial oxide formation, the HT-RTPs in various ambient gases were conducted, and the dependences of their MOS interface properties on the gases were evaluated by a capacitance-voltage (CV) measurement. Based on the results, the process sequence of gate oxidation was determined as follows; the initial oxide was formed by the HT-RTO (oxidation) in N2O or in O2 with subsequent post annealing in Ar ambient, and then the HT-RTN (nitridation) in NO was conducted. The total process time becomes 20-50min. The interface trap density (Dit) of fabricated MOS capacitor shows 3-5x1011cm-2eV-1 at Ec-E~0.2eV. The field-effect channel mobility of fabricated 4H-SiC lateral MOSFETs was ~30cm2/Vs.

Abstract: We report on fabrication and characterization of n-channel Si face 4H-SiC MOSFETs made using sublimation grown epitaxial material. Transistors made on this material exhibit record-high peak field effect mobility of 208 cm2/Vs while reference transistors made on a commercial epitaxial material grown by chemical vapor deposition (CVD) show field effect mobility of 125 cm2/Vs. The mobility enhancement is attributed to better surface morphology of the sublimation grown epitaxial layer.

Abstract: Lateral inversion channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were manufactured on 6H-SiC and two gate oxidation recipes were compared. In one case the gate oxide was grown in N2O using quartz environment. The resulting peak field-effect mobility was µFE=43 cm2/Vs. In the other case the gate oxide was grown in oxygen using alumina environment and the resulting peak field-effect mobility was µFE=130 cm2/Vs. Oxidizing in an environment made from sintered alumina introduces contaminants into the oxide that effect the oxidation in several^ways. The oxidation rate is increased and the resulting SiC/SiO2 interface allows higher inversion channel mobility.

Abstract: We report investigations of Si face 4H-SiC MOSFETs with aluminum ion implanted gate channels. High quality SiO2/SiC interface is obtained both when the gate oxide is grown on p-type epitaxial material and when grown on ion implanted regions. A peak field effect mobility of 170 cm2/Vs is extracted from transistors with epitaxially grown channel region of doping 5x1015 cm-3. Transistors with implanted gate channels with aluminum concentration of 1x1017 cm-3 exhibit peak field effect mobility of 108 cm2/Vs, while the mobility is 62 cm2/Vs for aluminum concentration of 5x1017 cm-3. The mobility reduction with increasing acceptor density follows the same functional relationship as in n-channel Si MOSFETs.

Abstract: This paper reports on the degradation of inversion channel mobility of SiC MOSFET caused by the increase of channel doping. SiC MOSFETs were fabricated on three wafers, the doping concentrations of the epitaxial layer of which were 16 10 2× cm-3 (sample A), 17 10 2× cm-3 (sample B) and 17 10 4× cm-3 (sample C). The field effect mobility sharply decreases as the doping concentration increases. Hall mobility measurements have been done to investigate the degradation of the mobility due to doping. The measurement of sample A shows that, as a consequence of the decrease of the free carrier density due to MOS interface traps, the Hall mobility is as much as a factor of ten higher than the field effect mobility. In contrast, in regard to the measurement of sample B and sample C, we encountered unstable Hall voltage and could not obtain reproducible results. This implies that such high-density traps are generated that a channel disappears in the higher-doping samples.

Abstract: Short-channel effects in SiC MOSFETs have been investigated. Planar MOSFETs with various channel lengths have been fabricated on p-type 4H-SiC (0001), (000-1) and (11-20) faces.^Short-channel effects such as punchthrough behavior, decrease of threshold voltage and deterioration of subthreshold characteristics are observed. Furthermore, the critical channel lengths below which short-channel effects occur are analyzed as a function of p-body doping and oxide thickness by using device simulation. The critical channel lengths in the fabricated SiC MOSFETs are in agreement with those obtained from the device simulation. The results are also in agreement with the empirical relationship for Si MOSFETs.

Abstract: In our previous study, the on-resistance of the SiC-based vertical MOSFET had been reduced in double-epitaxial MOSFET (DEMOSFET). The device exhibited an on-resistance (Rons) of 8.5 mWcm2 with a blocking voltage (Vbr) of 600 V. This study analyzed the characteristics of the DEMOSFET using a numerical simulation. The results showed the trade-off relationship between the specific on-resistance and the blocking characteristics when the concentration of the nitrogen ions increases in the surface of the n-type region between the p-wells. Specially, the specific on-resistance was drastically improved by increasing the concentration of the nitrogen ions. The thick gate oxide on the n-type region between the p-wells had an advantage to suppress the electric field in the gate oxide.