Papers by Keyword: Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET)

Abstract: Optimum dose designing for 4H-SiC (0001) two-zone RESURF MOSFETs is investigated by device simulation and fabrication. Simulated results suggest that negative charge at the SiC/SiO2 interface significantly influences breakdown voltage. Simulation has also showed that breakdown voltage strongly depends on LDD (Lightly-Doped Drain) dose. The dose dependencies of the breakdown voltage experimentally obtained are in good agreement with the device simulation. A RESURF MOSFET, processed by N2O oxidation, with an optimized dose blocks 1080V and has a low on-resistance of 79 mcm2 at a gate oxide field of 3.0 MV/cm, which is the best 4H-SiC RESURF MOSFET ever reported.

Abstract: We have fabricated lateral RESURF MOSFETs on 4H-SiC(0001) Si-face and (000-1) C-face substrates, and compared those properties. The channel mobility of a lateral test MOSFET on a C-face was 41 cm2/Vs, which was much higher than 5 cm2/Vs for that on a Si-face. The specific on-resistance of the lateral RESURF MOSFET on a C-face was improved to 79 mΩcm2 as comparison with 2400 mΩcm2 for Si-face. The breakdown voltage was 490V for Si-face and 460V for C-face, which was 82% and 79% of the designed breakdown voltage of 600V, respectively. The device breakdown occurred destructively at the gate electrode edge.