Design of Real-Time Lossless Compression System Based on DSP and FPGA

Jian Hu Zhan; Wen Yi Liu

doi:10.4028/www.scientific.net/AMR.433-440.4173

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 433-440Design of Real-Time Lossless Compression System...

Design of Real-Time Lossless Compression System Based on DSP and FPGA

Abstract:

The application of the lossless data compression technology in the filed of telemetry system is discussed in this paper. Based on the ARC algorithm, a real-time lossless data compression technology is proposed. By combining the TMS320C6416 and XC3S200AN FPGA, this paper designs a real-time lossless data compression device hardware system. 2048 bytes of some telemetry noise data can be compressed in 5.64ms in this system and the compression removal rate reaches 78%. What’s more, the system has solved the problem of data capacity and speed during the process of data compression , which greatly improves the efficiency of data compression.

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Periodical:

Advanced Materials Research (Volumes 433-440)

Pages:

4173-4177

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.433-440.4173

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Online since:

January 2012

Authors:

Jian Hu Zhan, Wen Yi Liu

Keywords:

Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), Lossless Data Compression

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References

[1] XU Yu, Ye Wei dong. The study of compress of fast varying parameter in telemetry system, Remote Measurement And Control. 2008. Vol. 29. No. 1: 63-67.

Google Scholar

[2] Zhang Yan. Multi-channel high-speed data acquisition and storage system . IEEE Proceedings of the 5th International Conference on Wireless communications, networking and mobile computing 2009 Pages: 2022-(2025).

DOI: 10.1109/wicom.2009.5301582

Google Scholar

[3] XILINX. Spartan-3 Generation Configuration User Guide. www. xilinx. com . (2009).

Google Scholar

[4] M. S. Pinho, W. A. Finamore, Using arithmetic code to improve performance of Lempel–Ziv encoders, IEE Electronics Letters (2000) 1563–1565.

DOI: 10.1049/el:20001093

Google Scholar

[5] F. Rubin, Arithmetic Stream Coding Using Fixed Precision Registers, IEEE Trans. Inform. Theory, IT-25, 6(1979)672-675.

DOI: 10.1109/tit.1979.1056107

Google Scholar