Design and Realization of Embedded High-Speed Image Stabilization Device Base on FPGA+DSP

Jie Tao Diao; Jin Ling Xing; Hong Qi Yu; Yi Nan Wang; Yang Yang

doi:10.4028/www.scientific.net/AMR.546-547.1586

Paper Titles

Research on the ELAC Systems of A320 Family Aircrafts
p.1562

Study on the Measurement Method and Safety Design of Ultrasonic Cleaning Equipment
p.1568

Design of FPGA-Based Fault-Tolerant Embedded System
p.1574

Position Sensorless Detection of SRM Based on BP Neural Network
p.1580

Design and Realization of Embedded High-Speed Image Stabilization Device Base on FPGA+DSP
p.1586

Enhancement of Acoustic Field Aberration for Underwater Forward Detection with Experimental Verification
p.1592

Finite Element Method Used in the Calculation of Earth-Rock Dam Seepage Reflections
p.1598

Multi-Function Manipulator
p.1602

Study of NC Frequency Source Based on the GPS Atomic Clock System
p.1608

HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 546-547Design and Realization of Embedded High-Speed...

Design and Realization of Embedded High-Speed Image Stabilization Device Base on FPGA+DSP

Abstract:

A design and realization of embedded High-speed image stabilization device is present to remove unwanted shaking phenomena in the image sequences captured by the high-speed industrial camera with 256x256 pixel @1000 frames per second, 8bit, Gray scale. Each module design of the mentioned device is introduced in detail. The interested image sequences are transferred through camera link interface to the device, buffered, preprocessed by an FPGA, and processed by DSP to achieve two-dimensional motion vector which is exported by a digital-to-analog chip. The test result shows that the image stabilization device works stable, real-time, high-accuracy.

You might also be interested in these eBooks

Electrical Insulating Materials and Electrical Engineering

View Preview

Info:

Periodical:

Advanced Materials Research (Volumes 546-547)

Pages:

1586-1591

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.546-547.1586

Citation:

Cite this paper

Online since:

July 2012

Authors:

Jie Tao Diao, Jin Ling Xing, Hong Qi Yu, Yi Nan Wang, Yang Yang

Keywords:

Digital Signal Processor (DSP), Embedded, Field-Programmable Gate Array (FPGA), Image Stabilization

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

References

[1] F. Vella, A. Castorina. M. Mancuso, and G Messina．Robust digital image stabilization algorithm using block motion vectors．International Conference on Consumer Electronics，l 8-20 June 2002：234—235.

DOI: 10.1109/icce.2002.1014008

Google Scholar

[2] S．-J．Ko，S．-H．Lee，and K．-H．Lee．Digital image stabilizing algorithms based on bit-plane matching．IEEE Trans．on Consumer Electronics，August 1998，44(3)：617-622.

Google Scholar

[3] S. -J. Ko, S. -H. Lee, Fast digital image stabilizer based on gray-coded matching．IEEE Trans. On Consumer Electronics，1 999，45(3)：598-603.

DOI: 10.1109/30.793546

Google Scholar

[4] specifications of the camera link interface standard for digital cameras and frame grabbers. http: /www. lord-ing. com /web /IMG /pdf / Camera_Link. pdf.

Google Scholar

[5] Sung-Jea Ko, Sung-Hee Lee, Seung-Won Jeon, Eui-Sung Kang. Fast digital image stabilizer based on gray-coded bit-plane matching. IEEE Transactions on Consumer Electronics. 1999, 45(3): 598-603.

DOI: 10.1109/30.793546

Google Scholar