Advanced Materials Research Vols. 588-589

Abstract: The acoustic parameters of the sea bottom were an important factor which affected the acoustic wave transmission in shallow water. This work devoted to study the effect of sea bottom parameters on acoustic wave transmission. The sea bottom was divided into two layers. The acoustic wave transmission loss(tl) under different sea bottom parameters was computed using KRAKENC program in the frequency of 500Hz. The simulated results showed that the acoustic parameters of sediment layer had important effect on acoustic wave transmission and the acoustic parameters of basement layer had almost no effect on acoustic wave transmission.

Abstract: This article has designed a digital signal transmission performance analysis system using FPGA. It uses FPGA to generate the m-sequence whose frequency can be adjusted step by step and it uses Manchester encoding. Through the transmission channel, a fast bit synchronization detection arithmetic is used to abstract bit synchronization clock by FPGA. The oscilloscope can use the bit synchronization clock to observe eye diagram and other information. The system has the advantages of good transplant, small size, low-power consumption and high reliability.

Abstract: A monolithic peak-current-mode boost WLED driver with an on-chip compensator is presented. In order to predict the system performance, the equivalent circuit model of boost WLED driver is constructed to obtain the system transfer function. Then, an on-chip compensator, which requires small layout area, is analyzed and designed. The simulation results, based on CSMC 0.5µm 40V BCD technology, show that the internal compensation technique provides high loop accuracy and stability over a wide load range from 20mA to 180mA. The proposed driver is capable of driving 10WLEDs connected in series or 3WLEDs with 9 strings in parallel. Protection circuits, such as over voltage protection (OVP), over temperature protection (OTP), over current protection (OCP) and under voltage lockout (UVLO) are also utilized to guarantee the safe operations of the system.

Abstract: This paper propose a two-tiered network in which lower-power users communicate with one another through repeaters, which amplify signals and retransmit them, have limited capacity, and may interfere with one another if their transmitter frequencies are close and they share the same private-line tone. Motivated by cellular networks, this paper gives a naive solution where the number of repeaters and their positions can be obtained analytically. In a circular area with radius 40 miles, 12 repeaters can accommodate 1,000 simultaneous users. This paper further propose an iterative refinement algorithm consisting of three fundamental modules that draw the Voronoi diagram, determine the centers of the circumscribed circles of the Voronoi regions, and escape the local optimum by using external optimization. The algorithm obtains a solution with 11 repeaters, which we prove to be the absolute minimum. For 10,000 users, it uses 104 repeaters, better than the naive solution's 108.

Abstract: A new pseudo-Fourier series (PFS) method to suppress single-frequency noise is proposed in this paper. The basic principle is derived in detail. Numerical experiments show that the PFS method is highly effective in extracting harmonic signal and when the frequency of the extracted composition is very close to that of the noise composition, the filtering effect will be slightly decreased, and the close range is about 1e-4. Four types of ground tides are successfully filtered out for picking-up the long-term trend of the tilt observation and the mutational abnormality.

Abstract: An interleaved flyback converter using a dsPIC digital signal controller is researched and designed, regarding to photovoltaic (PV) grid-connected micro inverter’s characteristics, the system structure and control principles is studied, and a new method combining Constant Voltage (CV) and Perturb and Observe(P&O) to track the Maximum Power Point (MPP) is applied. The prototype experiments verify that the inverter can better realize the most power tracing and island detection function, at the same time reduce the current output ripple, lower its THD.

Abstract: In this paper, the method of wavelet domain adaptive filtering was used to de-noise NMR echo data. Numerical simulation was used to compare the relationship between the SNR of NMR echo data and the results of T2 spectrum inversion before and after the de-noising procedure. The effectiveness of the wavelet domain adaptive filtering in the de-noising of NMR data was demonstrated. Compared with the traditional wavelet threshold de-noising, this adaptive de-noising method can obtain higher SNR results without the loss of useful signal.

Abstract: The method of maximum power point tracker with PIC18F4520 controlling in photovoltaic power system has been described in this paper. Maximum power point tracker is implemented with a non-inverting buck-boost DC-DC conversion topology. The system is simple with good response speed. And the efficiency of system is approved apparently with the method.

Abstract: Proposed the design method that separation of coking chamber’s number identification and accurate position. Researching new coke oven locomotive positioning system application of radio frequency identification and image processing technology, use radio frequency identification technology on accurate identification of coking chamber’s number, and then use the video camera to identify door image and its center point for accurate positioning of coke oven locomotive.

Abstract: An attractive technique of variable-length Fast Fourier transform (FFT) processor is proposed for PAPR reduction in orthogonal frequency division multiplexing (OFDM) systems. Mixed-radix algorithm and single path delay feedback (SDF) pipeline architecture is adopted to obtain low computation complexity and preferable flexibility for its VLSI implementation. The FFT processor can be reconfigured as 512, 1024, 2048, 4096-points, moreover, the only one RAM unit is used for store sine/cosine tables. The chip is mapped to the 0.18 CMOS technology and the core area is 7.896mm2. The experiment results show that the proposed FFT processor is suitable for PAPR reduction in OFDM communication systems.