Investigation on Fine Polishing Technique of Silicon Wafer

Quan Cheng Gong; Jian Zhu; Shi Xing Jia; Jing Wu

doi:10.4028/www.scientific.net/AMR.60-61.232

Paper Titles

Modeling of Capacitive Microaccelerometers with Squeeze Film Damping and Electrostatic Effects Using Model Order Reduction
p.213

Real-Time and High-Performance Attitude and Heading Reference System Based on MIMU/Magnetometers
p.219

A Bulk RF MEMS Switch by Silicon-to-GaAs Bonding
p.224

Fabrication of Nanomechanical Resonators in Silicon Nitride
p.228

Investigation on Fine Polishing Technique of Silicon Wafer
p.232

Electrical Model of Inside Sense Outside Drive Frame Micro-Gyroscope Including Quadrature Error and Coriolis Offset
p.236

Advance of the Micro-Magnetometer MEMSMag Research
p.241

Fabrication and Sensing Properties of PSZT Thin Films for Micro-Force Sensors
p.246

High Efficient Synthesis of Carbon Nanocoils by Catalysts Produced by a Fe and Sn Containing Solution
p.251

HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 60-61Investigation on Fine Polishing Technique of...

Investigation on Fine Polishing Technique of Silicon Wafer

Abstract:

This paper presents a kind of fine polishing technique that adopts three-step polishing procedure and keeping-wafer-wet method. In order to remove the damaged layer created by lapping process or improve surface condition of silicon wafer, polishing process is needed. In this paper, techniques of improving the surface roughness of silicon are studied, three different polishing processes are presented, and optimum condition has been attained. Experiments of Si-Si bonding are also performed, and results show that after polishing ends, keeping surface of wafer wet is necessary to avoid slurry agglomerating.