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The Ferroelectric Field Effect Transistor Simulation and Analysis

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Abstract:

A ferroelectric field effect transistor (FFET) with the metal/ferroelectric/ semiconductor (MFS) structure is designed and simulated. The simulation results show that the drain current at Vg=0 after polarized is decided by Pr and Pr/Ps. When increasing Pr, Id enhanced. When Pr/Ps decreases, Id increases if the FFET is saturated. When a voltage (Vp=1.5v) is applied on the FFET, Id may be stable and not sensitive to the variation of Pr/Ps. This FFET stable output voltage is decided by Ec.

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Periodical:

Advanced Materials Research (Volume 873)

Pages:

850-854

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.873.850

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Online since:

December 2013

Authors:

Qiang Wang*, Sun Hao Chen Zhang, Zheng Dong Yu, Guo Ran Hua

Keywords:

Coercive Voltage, Drain Current, FFET, Polarization Voltage, Simulation

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© 2014 Trans Tech Publications Ltd. All Rights Reserved

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