The Delta-Sigma Modulator of Fractional-N Frequency Synthesizer for Wireless Sensors Network Applications

Zhi Qiang Gao; Jin Bao Lan; Xiao Wei Liu; Liang Yin

doi:10.4028/www.scientific.net/KEM.609-610.1014

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HomeKey Engineering MaterialsKey Engineering Materials Vols. 609-610The Delta-Sigma Modulator of Fractional-N...

The Delta-Sigma Modulator of Fractional-N Frequency Synthesizer for Wireless Sensors Network Applications

Abstract:

This paper presents a design of fractional-N frequency synthesizer with low dithering, which is fabricated in a 130nm CMOS process. A 3^rd-order delta-sigma modulator is based on digital multi-stage noise shaping (MASH) structure with its second and third stage dithered by 7-bit linear feedback shift register (LFSR) was designed for the frequency synthesizer, and a long word is used for the first modulator in the MASH structure. The simulation result of the whole frequency synthesizer shows that it can output two-way I/Q signal between 2.28GHz and 2.53GHz, and its spurs are lower than-75dBc.

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Periodical:

Key Engineering Materials (Volumes 609-610)

Pages:

1014-1019

DOI:

https://doi.org/10.4028/www.scientific.net/KEM.609-610.1014

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Online since:

April 2014

Authors:

Zhi Qiang Gao*, Jin Bao Lan, Xiao Wei Liu, Liang Yin

Keywords:

Delta-Sigma Modulator (DSM), Dither Techniques, Fractional-N Synthesizer, Multi-Stage Noise Shaping (MASH), Noise Shaping, Phase Locked Loop (PLL)

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References

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