Threshold Voltage Adjustment on 4H-SiC MOSFETs Using P-Doped Polysilicon as a Gate Material

Alexander May; Mathias Rommel; Affan Abbasi; Tobias Erlbacher

doi:10.4028/p-w6bx49

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HomeKey Engineering MaterialsKey Engineering Materials Vol. 947Threshold Voltage Adjustment on 4H-SiC MOSFETs...

Threshold Voltage Adjustment on 4H-SiC MOSFETs Using P-Doped Polysilicon as a Gate Material

Abstract:

To scale digital circuits, symmetric threshold voltages (V_th) for n-type transistors (NMOS) and p-type transistors (PMOS) are important. One step towards this in silicon carbide (SiC) is selecting a p-doped polysilicon (pPolySi). This implementation has been shown in this work with V_th being evaluated by five different methods. Furthermore, operating temperatures up to 500 °C and their impact on V_th were investigated. It has been successfully demonstrated that elevated temperature shifts V_th of both transistor types towards 0 V, whereas changing the gate electrode from n-doped PolySi (nPolySi) to pPolySi shifts V_th of both transistor types to more positive values. Both effects are complementary for the PMOS, reaching V_th below 4 V.

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Periodical:

Key Engineering Materials (Volume 947)

Pages:

57-62

DOI:

https://doi.org/10.4028/p-w6bx49

Citation:

Cite this paper

Online since:

May 2023

Authors:

Alexander May*, Mathias Rommel, Affan Abbasi, Tobias Erlbacher

Keywords:

4H-SiC CMOS, P-Doped Polysilicon, PMOS, Threshold Voltage

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Creative Commons CC BY 4.0

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* - Corresponding Author

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