4H-SiC Power VDMOSFET Manufacturing Utilizing POCl3 Post Oxidation Annealing

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Abstract:

A novel POCl3 post-oxidation annealing recipe was developed. The interface trap density (Dit) is extracted by the C-ΨS method close to conduction band edge. The performance of the POCl3-treated oxide has been analyzed based on current density-electric field (J-E) measurements. A comprehensive and practical 4H-SiC power VDMOSFET manufacturing traveler has been designed. The power MOSFET that was fabricated based on this traveler exhibits less than half of the on-resistance and shows improved interface characteristics compared to a similarly designed commercial power MOSFET.

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Materials Science Forum (Volume 1004)

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559-564

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July 2020

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© 2020 Trans Tech Publications Ltd. All Rights Reserved

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