Effect of Phosphorus Doped Poly Annealing on Threshold Voltage Stability and Thermal Oxide Reliability in 4H-SiC MOSFET

Kwang Won Lee; Young Ho Seo; Taeseop Lee; Kyeong Seok Park; Martin Domeij; Fredrik Allerstam; Thomas Neyer

doi:10.4028/www.scientific.net/MSF.1004.554

Paper Titles

Graphene Quality Assessment Using an Entropy Approach of SEM Images
p.525

Pre-Deposition Interfacial Oxidation and Post-Deposition Interface Nitridation of LPCVD TEOS Used as Gate Dielectric on 4H-SiC
p.535

Surface Treatment of 4H-SiC MOSFETs Prior to Al₂O₃ Deposition
p.541

Development of High-Quality Gate Oxide on 4H-SiC Using Atomic Layer Deposition
p.547

Effect of Phosphorus Doped Poly Annealing on Threshold Voltage Stability and Thermal Oxide Reliability in 4H-SiC MOSFET
p.554

4H-SiC Power VDMOSFET Manufacturing Utilizing POCl₃ Post Oxidation Annealing
p.559

Compatibility of POCl₃ Gate Process with the Fabrication of Vertical 4H-SiC MOSFETs
p.565

Wafer-Level near Zero Field Spin Dependent Charge Pumping: Effects of Nitrogen on 4H-SiC MOSFETs
p.573

Low-Energy Muons as a Tool for a Depth-Resolved Analysis of the SiO₂/4H-SiC Interface
p.581

HomeMaterials Science ForumMaterials Science Forum Vol. 1004Effect of Phosphorus Doped Poly Annealing on...

Effect of Phosphorus Doped Poly Annealing on Threshold Voltage Stability and Thermal Oxide Reliability in 4H-SiC MOSFET

Abstract:

We have investigated the effect of high temperature annealing of phosphorus doped poly on gate oxide integrity and device reliability. In NMOS capacitance analysis, unstable flat band voltage characteristics and lower oxide breakdown electric field were observed in wafers which received high temperature poly annealing at 1100 °C. Gate oxide integrity (GOI/Vramp) tests and time dependent dielectric breakdown (TDDB) tests were performed to evaluate wafer level reliability. Degraded GOI characteristics and poor gate oxide lifetime were obtained for the high temperature poly annealed condition. To evaluate package level reliability, high temperature gate bias (HTGB) stress tests were conducted. Some samples failed in positive gate bias stress and more severe negative threshold voltage shift was observed in negative gate bias stress for the high temperature poly annealed condition.