Evaluation of Line-Shape Defect in Epitaxial Wafer

Ling Guo; Daisuke Shiomi

doi:10.4028/p-99gtk8

Paper Titles

Stability, Evolution and Diffusion of Intrinsic Point Defects in 4H-SiC
p.371

Nitrogen Investigation by SIMS in Two Wide Band-Gap Semiconductors: Diamond and Silicon Carbide
p.376

Latest Advances in the Implementation and Characterization of High-K Gate Dielectrics in SiC Power MOSFETs
p.383

Fast Defect Mapping at the SiO₂/ SiC Interface Using Confocal Photoluminescence
p.389

Evaluation of Line-Shape Defect in Epitaxial Wafer
p.395

Electrical Scanning Probe Microscopy Investigation of Schottky and Metal-Oxide Junctions on Hetero-Epitaxial 3C-SiС on Silicon
p.400

A Deeper Look into the Effects of Extended Defects in SiC Epitaxial Layers on Device Performance and Reliability
p.406

Ni/Heavily-Doped 4H-SiC Schottky Contacts
p.411

Structural and Electrical Characterization of Ni-Based Ohmic Contacts on 4H-SiC Formed by Solid-State Laser Annealing
p.417

HomeMaterials Science ForumMaterials Science Forum Vol. 1062Evaluation of Line-Shape Defect in Epitaxial Wafer

Evaluation of Line-Shape Defect in Epitaxial Wafer

Abstract:

In this study, we investigated the origin of line-shape defect in 4H-SiC epitaxial wafers. The inspection results revealed that such defects resulted from the substrate entirely and accompanied with dislocation lines during the epitaxial process. Although the defect surface condition with nanometer level of roughness seemed to do little harm to the initial electrical characteristics of power devices, dislocation lines possibly resulted in high leakage current when reverse voltage was applied. To reduce line-shape defects, it is essential to reduce defects and threading dislocations in substrates and to develop a nondestructive method for wafer screening.

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