High-Speed Drive Circuit with Separate Source Terminal for 600 V / 40 A Normally-off SiC-JFET

Abstract:

When using JFETs with a threshold voltage lower than 2 V in a power supply system or inverter system, a high-speed drive circuit capable of precisely controlling the gate current and a mounting method are important to reduce the switching loss. In this paper, a drive circuit of a normally-off SiC-JFET with a separate source terminal is proposed and the effects are evaluated. By dividing the common source inductance and applying the speed-up capacitor, the turn-on time and turn-on energy losses can be decreased by 40% and 60%, respectively. A speed-up capacitor larger than 100 nF greatly decreases the rising time (tr) and turn-on energy losses. By applying the developed normally-off SiC-JFETs and proposed gate driver to PFC circuits and DC/DC circuits, a highly efficient power supply will be achieved.

• Periodical: Materials Science Forum (Volumes 740-742)
• Pages: 1060-1064
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.740-742.1060
• Online since: January 2013
• Authors: Katsumi Ishikawa, Kaoru Katoh, Ayumu Hatanaka, Kazutoshi Ogawa, Haruka Shimizu, Natsuki Yokoyama
• Keywords: Common Source Inductance, Junction Field Effect Transistor (JFET), Normally-Off, Separate Source Terminal, Speed-up Capacitor, Turn-on Loss

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