III-V/Ge Device Engineering for CMOS Photonics

Mitsuru Takenaka; Shinichi Takagi

doi:10.4028/www.scientific.net/MSF.783-786.2028

Paper Titles

Synthesis of Nanoporous Materials and their Functionalization for Environmental Applications
p.2005

Gas-Liquid In Situ Production of Ceramic Reinforced Aluminum Matrix Nanocomposites
p.2011

Local Strain Distribution in AlN Thick Films Analyzed by X-Ray Microdiffraction
p.2016

Nanostructure Control of Si and Ge Quantum Dots Based Solar Cells Using Plasma Processes
p.2022

III-V/Ge Device Engineering for CMOS Photonics
p.2028

Formation of Self-Organized Pore Arrays on Metallic Substrates by Anodization and their Applications
p.2034

Catalytic Properties of Ni-Al Intermetallic Nanoparticles Fabricated by Thermal Plasma Process
p.2040

Development of Nanoalloy Catalysts for Realization of Carbon-Neutral Energy Cycles
p.2046

Enhanced Wettability of Cubic Boron Nitride Films by Plasma Treatment
p.2051

HomeMaterials Science ForumMaterials Science Forum Vols. 783-786III-V/Ge Device Engineering for CMOS Photonics

III-V/Ge Device Engineering for CMOS Photonics

Abstract:

Heterogeneous integration of III-V compound semiconductors and Ge on the Si platform is one of the promising technologies for enhancing the performance of metal-oxide-semiconductor field effect transistors (MOSFETs) beyond the 10-nm technology node because of their high carrier mobilities. In addition, the III-Vs and Ge are also promising materials for photonic devices. Thus, we have investigated III-V/Ge device engineering for CMOS photonics, enabling monolithic integration of high-performance III-V/Ge CMOS transistors and III-V/Ge photonics on Si. The direct wafer bonding of III-V on Si has been investigated to form III-V on Insulator for III-V CMOS photonics. Extremely-thin-body InGaAs MOSFETs with the gate length of approximately 55 nm have successfully been demonstrated by using the wafer bonding. InP-based photonic-wire waveguide devices including micro bends, arrayed waveguide gratings, grating couplers, optical switches, and InGaAs photodetectors have also been demonstrated on the III-V-OI wafer. The gate stack formation on Ge is one of the critical issues for Ge MOSFETs. Recently, we have successfully demonstrated high-quality GeO_x/Ge MOS interfaces formed by thermal oxidation and plasma oxidation. High-performance Ge pMOSFET and nMOSFET with thin EOT have been obtained using the GeO_x/Ge MOS interfaces. We have also demonstrated that GeO_x surface passivation is effective to reduce the dark current of Ge photodetectors in conjunction with gas-phase doped junction. We have also investigated strained SiGe optical modulators. We expect that compressive strain in SiGe enhances modulation efficiency, and an extremely small V_πL of 0.033 V-cm is predicted. III-V/Ge heterogeneous integration is one of the promising ways for achieving ultrahigh performance electronic-photonic integrated circuits.