Advanced TSV Filling Technology for 3-Dimensional Electronic Packaging

Abstract:

The development of 3D integration is necessarily required for high speed, high density, small size, and multi-functional electronic devices. Through silicon via (TSV) technology has been rapidly developed to fulfill the demand of the next generation of multifunctional electronic systems as one of the most alternative applications for 3D packaging. In this study, low cost and high speed molten solder-filling of TSV and bonding process by using micro bump was investigated. Micro bumps were formed with two step, Cu pillar bump and Sn-Ag cap bump by using electroplating. The size of micro-bumps was 10 and 20um and the precise content of the bump was developed with good planarity by adding reflow process. Additionally, the SiC nanoparticle composite solder was fabricated for low CTE filling material. From the results, it is possible that the CTE of composite solder added 1.0wt% SiC nanoparticles had decreased until 15.0ppm/°C. Comparing CTE of pure Sn, which was about 24.0ppm/°C, it was very low CTE and lower then CTE of Cu (16.5ppm/°C). Even if the electrical resistance of nanopowder composite solder is increased, the increasing rate is very slow until 1.0 wt%. However, the resistance changing rate is rapidly increased over the 1.0wt%. From the result, it is expected that nanopowder composite solder can contribute high reliability of molten solder filling TSV.

• Periodical: Materials Science Forum (Volumes 783-786)
• Pages: 2758-2764
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.783-786.2758
• Online since: May 2014
• Authors: Chang Woo Lee*, Young Ki Ko, Yong Ho Ko, Jung Hwan Bang
• Keywords: 3D Packaging, Coefficient of Temperature Expansion (CTE), Micro-Bump, Nanocomposite Solder, Through Silicon via (TSV)

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