Contamination control has become a high-centered issue for the fabrication yield, performance and reliability of leading-edge ULSI devices. With the progress of sizing down dimensions in higher-density devices, complicated device structures and various novel electronic materials have been introduced, particularly in the latest devices such as CMOS and nonvolatile memory LSIs (Table I). On the other hand, high productivity is a necessity when you consider QTAT (quick turnaround time) and cost-effective flexible ULSI manufacturing lines. Therefore, effective contamination control coupled with adequate protocol has become essential in such production lines. The point of the protocol is minimization of damage caused by impurity metals diffused from these novel electronic materials [1-5].