Solid State Phenomena Vol. 346

Abstract: The Chemical Mechanical Planarization (CMP) process (polishing and substrate cleaning) results in defects that can be classified as mechanical (i.e., scratching), chemical (i.e., corrosion), or physiochemical (i.e., adsorbed contaminants) according to the mechanism of formation. This work will focus on the rationale design of p-CMP cleaning systems for emerging materials (silicon carbide (SiC)) that activate the cleaning chemistry via external stimuli such as megasonic energy. More specifically, using megasonic energy in the presence of supramolecular assemblies such as micelles and vesicles was employed for a “soft” (low shear force) defect removal process. Results indicate a correlation between the structure of the “soft” cleaning additives and induced megasonic energy on overall simulated defect removal. It was determined that effective particle removal was a second-order kinetic process with a concentration dependency (i.e. above and below the critical micelle concentration (CMC)) emerging as a key driver for the defect removal rate. Although, one apparent drawback is the generation of post-cleaning carbon residue due to the adsorption of the supramolecular structures to the SiC substrate.

Abstract: The removal of particle contamination is key to maximize yield. Some common particle removal techniques are not relevant anymore when complex and fragile structures are present on the surface. This led to the development of new cleaning processes based on innovative concepts to improve particle removal efficiency without any pattern damage. Some of these processes rely on a resist film lift off. One of these particle removal processes is studied in this paper. The process consists in some resist spin-coating followed by a diluted ammonia dispense to remove this film, which results in particle removal. This specific resist film is made of two immiscible organic polymers. A study was conducted to understand how the organization of these two polymers in the film is key for the film lift-off and the cleaning efficiency. This organization was shown to depend on the substrate contact angle and the resist formulation. A surface preparation is required on hydrophobic surface to reduce their water contact angle and ensure the efficiency of the process. As a result, compared to a high velocity aerosol cleaning technique, this resist peeling process requires multiple steps and a significant process time. A Particle Removal Efficiency study was then performed on blanket wafers to determine and understand how the different process parameters impacted on the cleaning efficiency. It led to the optimization of this process efficiency on blanket wafers. A comparison between an optimized process and a high velocity aerosol cleaning technique underlined the potential of such a process. Compared to high velocity aerosol cleaning, it demonstrated higher efficiency on blanket wafers, without causing any pattern damage on patterned wafers. These results lead to promising perspectives for using this process in the cleaning of fragile structure or targeting small particles with high adhesion.

Abstract: The EUV lithography process is increasingly employed in the advanced semiconductor process, and high-NA EUV equipment is being developed for high-volume manufacturing. Therefore, particle contamination control for EUV masks is a key success factor for the yield increase of the EUV lithography process in the future and for this, the needs of EUV pellicle will increase. Although materials for the EUV pellicle membrane are still under development, unlike ArF pellicles, its fabrication is complicated and difficult, resulting in low production yield and high production costs. To reduce EUV pellicle operating costs, it is possible to consider ways to reduce production costs by enhancing the yield of EUV pellicle or reusing particle contaminated EUV pellicle by particle removal. Both methods require damage-free particle removal technology of EUV pellicle. Pinpoint particle removal technology, a cleaning technology that satisfies these requirements, was developed, and particles bigger than 5 μm could be removed in a cleanroom environment without damaging fragile EUV pellicle. The possibility of the damage-free EUV pellicle cleaning process was verified through the process window evaluation of Pinpoint cleaning technology.

Abstract: A comprehensive understanding of electrostatic-induced particle trapping during semiconductor wafer cleaning processes is paramount for enhancing device yield and performance. In this study, we employed a three-dimensional (3D) simulation framework to systematically analyze the interplay between electrical field strength, particle size, and electrostatic forces on particle trapping phenomena and defect pattern formation. Our findings revealed that increased electrical field strength and decreased particle size contribute to a higher probability of particle trapping and the emergence of distinct defect patterns. Based on these insights, we propose an optimization strategy to improve the cleaning process efficiency and minimize particle trapping, ultimately advancing the yield and performance of semiconductor devices.

Abstract: Photoresist after implantation is commonly removed either by wet chemical dissolution with sulfuric acid, or by dry ash stripping followed with a wet cleaning. To prevent any photoresist residues, sulfuric acid is still conserved in post ash cleans as additional safety. However, by ensuring sufficient over ash time, SPM (Sulfuric acid Peroxide hydrogen Mixture) chemical need becomes less essential. This paper reevaluates the benefit of SPM after dry ash stripping regarding the environmental context. The advantages of dry ash stripping with clean, compared to wet stripping are outlined. The study introduces prior analyses on defectivity and material consumption. Finally, device matching and yield stability, defined as the main success criteria, are described.

Abstract: The semiconductor industry is a significant consumer of water and chemicals. In particular, water is a valuable resource, and its efficient use is crucial to ensure availability for future generations. By implementing measures to reduce water and chemical consumption, the semiconductor industry can minimize its environmental footprint and contribute to sustainability efforts. Technology for the recycling of unused hot ultrapure water (H-UPW), ozonated water and reclaimed sulfuric acid-hydrogen peroxide mixtures (SPM) has been developed and installed in high-volume manufacturing (HVM) semiconductor manufacturing facilities. This paper presents an overview of the technology and expected savings in water, sulfuric acid and energy consumption from the implementation of these technologies.

Abstract: A large amount of chemicals and ultrapure water (UPW) have been used for wet cleaning process in the semiconductor manufacturing processes. One of the most commonly used cleaning solutions is Sulfuric acid (H₂SO₄) and Hydrogen Peroxide (H₂O₂) Mixture (SPM). It is used for resist stripping, etc. on a silicon wafer. As the cleaning process increases, so does the amount of chemicals used with the recent miniaturization. As a result, wastewater will also increase, and there are concerns about the impact on the environmental aspects. The technologies to reduce H₂SO₄ [1, 2] have been developed, but its consumption still persists. Therefore, in this paper, we developed high concentrated O₃-water without using H₂SO₄, and conducted a resist stripping test verify its effectiveness as an alternative to SPM.

Abstract: A novel add-on hardware device is placed near the point of slurry dispense that can instantaneously activate slurry performance during polishing via megasonic irradiation. This new technology (Flucto-CMP® is able to overcome the inherent polisher-slurry weaknesses such as wafer-level defects, process vibrations, cost of ownership, slurry waste, remval rate (RR), and RR selectivity. Flucto-CMP® has been successfully applied to various types of CMP slurries resulting in significant increases in the removal rates of copper, SiC, borosilicate hard mask, ILD, TiN, and silicon carbide through chemical alteration of the passivation layer needed for material removal. Specifically, for copper CMP, using Flucto-CMP®, we see an up to 31% boost in RR which is well correlated with the amount of reactive oxidizing species generated through irradiation as well as the measured relative indentation depth of the passivation layer. In addition to boosts in RR, for copper, we see a 50X drop in the variance of shear force and a 5X drop in the variance of normal force when Flucto-CMP® is used. This dramatic reduction in process vibration for copper soft-landing processes ought to reduce wafer-level defects. Much greater rate improvements are observed when polishing SiC, and borosilicate hard masks.

Abstract: Tetramethylammonium hydroxide (TMAH) and N-methyl pyrrolidinone (NMP) are commonly used in photoresist developing and stripping process, however, both of TMAH and NMP have been confirmed with CMR (Carcinogenic, Mutagenic and Reprotoxic) concerns. With more attention attracted to TMAH and NMP replacements, Huntsman developed a range of new quaternary amines products, including E-GRADE^® Choline OH (Choline Hydroxide), E-GRADE^® THEMAH (Tris (2-hydroxyethyl) methylammonium Hydroxide), XHE-125, XHE-128, XHE-138, XHE-145 and XHE-148, and solvents, E-GRADE^® MEOX (3-Methyl-2-oxazolidinone) and XHE-123, which have been evaluated in comparison with the performance of TMAH and NMP.

Abstract: Wet chemicals for ruthenium (Ru) etching are required for the formation of reliable Ru interconnects in advanced semiconductor technology nodes. In the present study, a novel alkali wet etchant, referred to as TK-1, has been developed in order to overcome issues with conventional Ru etchants, such as a low etch rate and the formation of toxic RuO₄ gas. Regardless of the Ru deposition process, TK-1 exhibits a high Ru etching selectivity of greater than 100 relative to dielectric and liner materials. It also suppresses the production of RuO₄ during the etching process. TK-1 has potential applications for Ru recess etching during fully self-aligned via fabrication.