Papers by Author: Yoshitaka Sugawara

Abstract: To reduce the switching power losses of SiC bipolar devices, an electron irradiation lifetime control method was investigated and was successfully applied to the development of 200kVA full SiC inverters, in which SiCGTs and SiC pn diodes irradiated electrons were used at the condition required to minimize inverter power loss.

Abstract: The behavior of stacking faults with regard to Vf degradations and TEDREC phenomena for 4.5 kV SiCGT have been investigated through the use of light emission images. Stacking faults, which cause Vf degradations, are expanded when current densities are increased. A novel phenomena of Vf degradation reduction, TEDREC phenomena, was found, which can reduce degradation by increasing operating temperature. It was observed for the first time that stacking faults become inactive by elevating temperatures to more than 150 oC in spite of existing stacking faults, which is a factor that contributes to TEDREC phenomena.

Abstract: This paper reports on the achievement of high-power 4H-SiC Zener diodes which have a high-doped pn junction with a large active area of 4 mm x 4 mm. The temperature coefficient of the breakdown voltage is as small as 5.7x10-5 1/K (positive) in the temperature range 20-300°C. In addition, reverse power capabilities of 6.3 kW (40 kW/cm2) at 20°C and 6.0 kW (38 kW/cm2) at 300°C during rectangular pulsed power operation (tw = 1 ms) have been achieved without device failure.

Abstract: We investigated the location of the nuclei of Shockley-type stacking faults (SSFs) in the 4H-SiC pin diodes, using electroluminescence (EL) imaging. The nuclei of SSFs were identified as three types, located (i) on the mesa edge, (ii) in the surface region, and (iii) inside the epilayer. We compared the frequency of the nuclei according to these three locations for the (0001) and (000-1) pin diodes. The number of SSFs originated from the nuclei inside the epilayer in the (000-1) pin diodes was much less (<4 cm-2) than that in the (0001) pin diodes. However, the numbers of SSF nuclei (0.3 ~ 0.8 per device) located on the mesa wall and the surface region in the (000-1) pin diodes were comparable to the (0001) pin diodes. We also investigated the process responsible for generating the SSF nuclei.

Abstract: Forward voltage degradation has been reduced by fabricating diodes on the (000-1)C-face. The reverse recovery characteristics of the 4H-SiC pin diode on the (000-1)C-face have been investigated. The pin diode on the C-face has superior potential to that on the Si-face among all parameters of the reverse recovery characteristics. The pin diode on the Si-face after conducting a current stress test tends to exhibit a fast turn-off as compared with that before conducting the stress test. On the C-face, however, there is little difference in reverse recovery characteristics between before and after conducting the current stress test.

Abstract: To achieve large current capability in spite of present small SiC devices that are limited by various crystal defects, focus was placed on SiC GTO thyristor and SICGT have been developed as an advanced SiC GTO. SICGTs with current capability of 1.6-100 A and blocking voltage of 3-12.7 kV and a 3 phase PWM SICGT inverter with output power of 35 kVA have been successfully developed. Furthermore, application of the SiC inverter aimed to a load leveling system was demonstrated.

Abstract: Propagation and nucleation of basal plane dislocations (BPDs) in 4H-SiC(000-1) and (0001) epitaxy were compared. Synchrotron reflection X-ray topography was performed before and after epitaxial growth to classify the BPDs into those propagated from the substrate into the epilayer and those nucleated in the epilayer. It was revealed that the propagation ratio of BPDs for the (000-1) epitaxy was significantly smaller than that for the (0001) epitaxy. Growing (000-1) epilayers at a high C/Si ratio of 1.2 achieves a further reduction in BPDs to only 3 cm-2 for those propagated from the substrate, and 16 cm-2 for those nucleated in the epilayer. A dramatic increase was also found in the nucleation of BPDs omitting the re-polishing and in-situ H2 etching procedure.

Abstract: We provide evidence of shrinking of Shockley-type stacking faults (SSFs) in the SiC epitaxial layer by high temperature annealing. Photoluminescence (PL) mapping in combination with high-power laser irradiation makes it possible to investigate the formation of SSFs, which lie between a pair of partial dislocations formed by dissociation of a basal plane dislocation (BPD), without fabrication of pin diodes. Using this technique, we investigated the annealing effect on SSFs. Comparing before and after annealing at 600°C for 10 min, it became obvious that high-temperature annealing results in shrinking of the faulted area of the SSFs. The SSFs form into the same features as those before annealing when high-power laser irradiation is performed again on the same area. This result shows that the faulted area of SSFs shrinks by 600°C annealing but the nuclei of SSFs (BPDs) do not disappear.

Abstract: The dependence of forward voltage degradation on crystal faces for 4H-SiC pin diodes has been investigated. The forward voltage degradation has been reduced by fabricating the diodes on the (000-1) C-face off-angled toward <11-20>. High-voltage 4H-SiC pin diodes on the (000-1) C-face with small forward voltage degradation have also been fabricated successfully. A high breakdown voltage of 4.6 kV and DVf of 0.04 V were achieved for a (000-1) C-face pin diode. A 8.3 kV blocking performance, which is the highest voltage in the use of (000-1) C-face, is also demonstrated in 4H-SiC pin diode.

Abstract: In this paper, we investigated the density of basal plane dislocations (BPDs) in 4H-SiC epilayers grown on (0001) and (000-1). Re-polishing of the substrate surface, in-situ H2 etching and off-cut angle were found to influence the propagation of BPDs into the epilayers. The epitaxial growth on (000-1) substrates yields a relatively low density of BPDs compared to growth on (0001). The electrical characteristics of pn diodes were also investigated, and the suppressed forward degradation and high-voltage blocking performance were obtained in the use of the (000-1) epilayers.