Defect and Diffusion Forum Vol. 434

Abstract: We discuss two defect related practical improvements in the corona noncontact CV metrology, (CnCV) for SiC. The improvements are introduced in response to requests from industrial tool users. The first improvement quantifies mapping of electrically active defects with the QUAD technique (Quality, Uniformity, and Defects). It provides the capability of user selectable die grids directly comparable with Near UV-PL and optical defect mapping. This shall enhance understanding of the device killer defects and help to correlate epilayer defects and device yield. The second improvement introduces auto-remeasurement of outliers appearing in doping measurements on defective sites. This procedure is analogous to that used in the Hg probe technique and it provides a means for correcting defect related distortions in SPC doping monitoring charts.

Abstract: To better understand the effects of various growth parameters during the early-stages of PVT growth of 4H-SiC on resulting defect structures, multiple short duration growths have been carried out under varying conditions of seed quality, nucleation rate, thermal gradients, and N incorporation. Besides the replication of TSDs/TMDs and TEDs as well as the deflection of TSDs/TMDs into Frank dislocations, synchrotron monochromatic beam x-ray topography (SMBXT) studies also reveal the formation of stacking faults bounded by Frank dislocations. Using ray tracing simulations to characterize the Frank dislocations, three types of stacking faults are revealed: Type 1 stacking fault resulting from 2D nucleation of 6H polytype on terraces; Type 2 stacking fault resulting from macrostep overgrowth of the surface growth spiral steps of TSDs/TMDs which separate into c/2 or c/4 increments; Type 3 stacking fault resulting from vicinal step overgrowth of surface growth spiral steps of TSDs/TMDs which separate into c/4 and 3c/4 increments. Analysis of atomic resolution scanning transmission electron microscopy (STEM) images reveals the mechanism of the Type 3 fault.

Abstract: 3-channel analysis technique consisting of optical inspection, photoluminescence and X-ray topography methods for defect inspection of SiC epitaxial wafers has been investigated. The effectiveness of SiC wafer inspection image correction to enable automatic defect analysis is verified. Next, it is shown that the 3-channel analysis technique improves SiC defect inspection accuracy compared to conventional 2-channel analysis one.

Abstract: Typically, research and development (R&D) results of epitaxial layer growth show superior properties of the grown layers compared to high volume results. Layer uniformities are excellent and achieved defect densities are low compared to typical results. In particular, the conversion of basal plane dislocations (BPD) from the silicon carbide (SiC) substrate is in focus to reduce bipolar degradation of p-n-junctions. It is a great challenge to maintain those excellent results in high-volume manufacturing considering all the factors that impact the properties of the epilayer. Thus, quality of the layers, high throughput and low cost have to be assessed to find a compromise between these key factors. In this paper we present results on the growth of epitaxial layers on 150 mm and 200 mm 4° off-oriented 4H-SiC substrates using warm-wall multi-wafer chemical vapor deposition (CVD) systems. Single wafer data of the key epitaxial layer parameters, thickness, doping and defect densities, are compared to batch and lot results, as well as to statistical data of several hundreds of wafers produced. Improvements in wafer-to-wafer (w-t-w) doping uniformity could be achieved for instance by implementation of an on-wafer temperature measurement. Substrate impact on defect levels is shown comparing X-ray topography (XRT) results of bare substrate wafers and defect analysis of epilayers on sister wafers from the same crystal. Statistical defect data and resulting predicted yield loss also show a dependence on substrate suppliers. For the first time we show w-t-w and run-to-run (r-t-r) results of doping and thickness measurements on 200 mm substrates. Also, defect results of epilayers on 200 mm wafers are compared to results on 150 mm.

Abstract: The development of non-destructive quantitative evaluation techniques for the in-plane depth distribution of sub-surface damage (SSD) layer induced by mechanical processing of chemical mechanical polishing (CMP) finished SiC wafers is essential to reduce the occurrence of crystal defects during epitaxial growth. Until now, no wafer inspection method has been able to nondestructively and quantitatively assess the in-plane depth distribution of the SSD. This study investigates the correlation between the scattered light intensity measured nondestructively by the Laser light scattering (LLS) method and the SSD depth estimated by destructive inspection using the Dynamic AGE-ing^® method, a sublimation-controlled etching and growth process, to develop a novel non-destructive SSD inspection method. As a result, it was found that there is an exponential relationship between the scattered light intensity by the LLS method on the bare wafer surface and the depth of the SSD layer that contributes to the formation of in-grown stacking faults (IGSF) during subsequent epitaxial growth. The results show that SiC wafer inspection using the novel LLS method, which introduces this relational equation, enables non-destructive and quantitative evaluation of SSD depth and in-plane distribution.

Abstract: This paper presents an investigation into the surface morphology control of 4H-SiC (0001) wafers cut to 4º off during thermal processing, aiming to suppress the propagation of basal plane dislocations (BPD) into the epitaxial growth layer. Developing methods for debunching rough surfaces with macro step bunching (MSB) using thermal processes removes many of the limitations of the conventional epitaxial growth process. This study presents a surface morphology control method that includes debunching of steps by thermal sublimation etching/growth using the Dynamic AGE-ing^® (DA) method. By controlling the surface morphology before and after growth using this method, the dependence of the BPD-threading edge dislocation (TED) conversion ratio on surface morphology was systematically revealed. By selecting the optimal pre- and post-growth surface morphology, a 100 % BPD-TED conversion ratio was obtained for the 10 mm × 25 mm area. It was indicated that an innovative and stable surface morphology control technique using the DA sublimation process could solve numerous technological challenges in various fields.

Abstract: The knowledge of capture properties of electrically active defects is of primary importance as it helps to understand which deep states are effective in controlling the excess free carriers’ lifetime. Combining DLTS capture experiments with thermal emission measurements enables an overall thermodynamic description of deep states, thus making it possible to characterize recombination centers in semiconductor-based devices. In the present study, junction DLTS capture rate measurements were employed to extract the true capture cross-sections (inversely proportional to the carrier lifetime) and capture energy barriers for the main lifetime limiting defects in 4H-SiC (silicon carbide). A peculiar forward bias dependence of the capture parameters was observed for the shallow boron (B) hole trap. Capture rate measurements on the deep boron (D-center) trap also evidenced the presence of two capture mechanisms, thus allowing discrimination of D₁ and D₂ deep states within the D-center DLTS peak. The results were combined with activation energies and apparent capture cross-sections to obtain the free energy (ΔG) of electronic activation for the analysed deep states.