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Paper Titles
Passivation of Very Fast Near-Interface Traps at the 4H-SiC/SiO2 Interface Using Sodium Enhanced Oxidation
p.101
Influence of Post-Ion-Implantation Annealing Temperature on the Characteristics of Gate Oxide on 4H Silicon Carbide
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Evolution of Interface State Density and Near Interface Oxide Traps under Controlled Nitric Oxide Annealing in SiO2/SiC Lateral MOSFETs
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Oxide and Interface Defect Analysis of lateral 4H-SiC MOSFETs through CV Characterization and TCAD Simulations
p.119
The Influence of Extended Defects in 4H-SiC Epitaxial Layers on Gate Oxide Performance and Reliability
p.127
NO Annealing Simulation of 4H-SiC/SiO2 by Charge-Transfer Type Molecular Dynamics
p.135
Improvement of Interface Properties for Thermally Oxidized SiC/SiO2 MOS Capacitor by Post Oxidation Annealing Treatment
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High Mobility Silicon Dioxide Layers on 4H-SiC Deposited by Means of Atomic Layer Deposition
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Temperature Dependent Mobility Model for Predictive TCAD Simulations of 4H-SiC
p.153

The Influence of Extended Defects in 4H-SiC Epitaxial Layers on Gate Oxide Performance and Reliability

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Abstract:

For the ongoing commercialization of power devices based on 4H-SiC, increasing the yield and improving the reliability of these devices is becoming more and more important. In this investigation, gate oxide on 4H-SiC was examined by time-zero dielectric breakdown (TZDB) and constant current stress (CCS) time-dependent dielectric breakdown (TDDB) method in order to get insights into the influence of the epitaxial defects on the gate oxide performance and reliability. For that purpose, MOS capacitors with different gate oxides have been fabricated. Crystal defects in the epitaxial layers have been detected and mapped by ultraviolet photoluminescence (UVPL) and interference contrast (DIC) imaging. The results of the comparison of electrical data and surface mapping data indicate a negative influence on the leakage current behavior for some extended epitaxial defects. Results from TDDB measurement indicated numerous extrinsic defects, which can be traced back to gate oxide processing conditions and defect densities.

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Periodical:

Materials Science Forum (Volume 1090)

Pages:

127-133

DOI:

https://doi.org/10.4028/p-4i3rhf

Citation:

Cite this paper

Online since:

May 2023

Authors:

Holger Schlichting*, Minwho Lim, Tom Becker, Birgit Kallinger, Tobias Erlbacher

Keywords:

4H-SiC, Epitaxial Defects, Gate Oxide, Reliability, Yield

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Creative Commons CC BY 4.0

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* - Corresponding Author

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