Performance of a 650V SiC Diode with Reduced Chip Thickness

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Abstract:

A significant performance gain of 650V SiC diodes is possible by reducing the wafer thickness from the standard thickness of 350 µm to < 150 µm. Not only the differential resistance of the diodes but also the Rth benefit from this chip thickness reduction. As consequence a further chip size reduction with accompanying capacitive charge reduction leads to a device with improved efficiency in PFC applications under both high load and low load conditions.

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Periodical:

Materials Science Forum (Volumes 717-720)

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921-924

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Online since:

May 2012

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© 2012 Trans Tech Publications Ltd. All Rights Reserved

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