Electrical Characterization of PiN Diodes with p+ Layer Selectively Grown by VLS Transport

Nicolas Thierry-Jebali; Mihai Lazar; Arthur Vo-Ha; Davy Carole; Véronique Soulière; Farah Laariedh; Jawad Hassan; Anne Henry; Erik Janzén; Dominique Planson; Gabriel Ferro; Christian Brylinski; Pierre Brosselard

doi:10.4028/www.scientific.net/MSF.740-742.911

Paper Titles

16 kV, 1 cm², 4H-SiC PiN Diodes for Advanced High-Power and High-Temperature Applications
p.895

SXRT Investigations on Electrically Stressed 4H-SiC PiN Diodes for 6.5 kV
p.899

Influence of in-Grown Stacking Faults on Electrical Characteristics of 4H-SiC Pin Diode with Long Carrier Lifetime
p.903

Development of High-Voltage 4H-SiC PiN Diodes on 4° and 8° Off-Axis Substrates
p.907

Electrical Characterization of PiN Diodes with p⁺ Layer Selectively Grown by VLS Transport
p.911

900V, 1.46mOhm-cm² 4H-SiC Depletion Mode Vertical JFET
p.915

Reliable Operation of SiC Junction-Field-Effect-Transistor Subjected to over 2 Million 600-V Hard Switch Stressing Events
p.921

A 69-mΩ 600-V-Class Hybrid JFET
p.925

Thermal Runaway Robustness of SiC VJFETs
p.929

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Electrical Characterization of PiN Diodes with p⁺ Layer Selectively Grown by VLS Transport

Abstract:

This paper deals with electrical characterization of PiN diodes fabricated on an 8° off-axis 4H-SiC with a p⁺⁺ localized epitaxial area grown by Vapour-Liquid-Solid (VLS) transport. It provides for the first time evidence that a high quality p-n junction can be achieved by using this technique followed by a High Temperature Annealing (HTA) process.