Experimental and Theoretical Study of 4H-SiC JFET Threshold Voltage Body Bias Effect from 25 °C to 500 °C

Philip G. Neudeck; David J. Spry; Liang Yu Chen

doi:10.4028/www.scientific.net/MSF.858.903

Paper Titles

Using SiC MOSFET’s Full Potential – Switching Faster than 200 kV/μs
p.880

Electrical Characterization of 1.2 kV-Class SiC MOSFET at High Temperature up to 380°C
p.885

Design and Economic Considerations to Achieve the Price Parity of SiC MOSFETs with Silicon IGBTs
p.889

Readiness of SiC MOSFETs for Aerospace and Industrial Applications
p.894

Experimental and Theoretical Study of 4H-SiC JFET Threshold Voltage Body Bias Effect from 25 °C to 500 °C
p.903

Processing and Prolonged 500 °C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect
p.908

Modelling of 4H-SiC VJFETs with Self-Aligned Contacts
p.913

Conduction Loss Reduction for Bipolar Injection Field-Effect-Transistors (BIFET)
p.917

A 500 °C Monolithic SiC BJT Latched Comparator
p.921

HomeMaterials Science ForumMaterials Science Forum Vol. 858Experimental and Theoretical Study of 4H-SiC JFET...

Experimental and Theoretical Study of 4H-SiC JFET Threshold Voltage Body Bias Effect from 25 °C to 500 °C

Abstract:

This work reports a theoretical and experimental study of 4H-SiC JFET threshold voltage as a function of substrate body bias, device position on the wafer, and temperature from 25 °C (298K) to 500 °C (773K). Based on these results, an alternative approach to SPICE circuit simulation of body effect for SiC JFETs is proposed.

You might also be interested in these eBooks

Silicon Carbide and Related Materials 2015

View Preview

Info:

Periodical:

Materials Science Forum (Volume 858)

Pages:

903-907

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.858.903

Citation:

Cite this paper

Online since:

May 2016

Authors:

Philip G. Neudeck*, David J. Spry, Liang Yu Chen

Keywords:

Body Effect, High Temperature, Integrated Circuit, JFET, Threshold Voltage

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

* - Corresponding Author

References

[1] D.J. Spry, P.G. Neudeck, L. Chen, D. Lukco, C.W. Chang and G.M. Beheim, accepted for publication in Mater. Sci. Forum as ICSCRM-2015 proceedings.

Google Scholar

[2] P.G. Neudeck, L. Chen, D.J. Spry, G.M. Beheim and C.W. Chang, Mater. Sci. Forum 821-823 (2015) 781-784.

Google Scholar

[3] G.W. Neudeck, The PN Junction Diode, second ed., Addison-Wesley, Reading, Massachusetts, 1989, Chapter 2, pp.19-37.

Google Scholar

[4] The SPICE Page, http: /bwrcs. eecs. berkeley. edu/Classes/IcBook/SPICE.

Google Scholar

[5] P. Antognetti and G. Massobrio, Semiconductor Device Modeling with SPICE, McGraw-Hill, New York, (1987).

Google Scholar

[6] P.G. Neudeck, D.J. Spry, L. Chen, C.W. Chang, G.M. Beheim, R.S. Okojie, L.J. Evans, R. Meredith, T. Ferrier, M.J. Krasowski and N. F Prokop, in Proceedings 2008 IMAPS International Conference on High Temperature Electronics, published by International Microelectronics and Packaging Society, Washington DC, 2008, pp.95-102.

DOI: 10.1557/proc-1069-d11-02

Google Scholar