Processing and Prolonged 500 °C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

David J. Spry; Philip G. Neudeck; Liang Yu Chen; Dorothy Lukco; Carl W. Chang; Glenn M. Beheim; Michael J. Krasowski; Norman F. Prokop

doi:10.4028/www.scientific.net/MSF.858.908

Paper Titles

Electrical Characterization of 1.2 kV-Class SiC MOSFET at High Temperature up to 380°C
p.885

Design and Economic Considerations to Achieve the Price Parity of SiC MOSFETs with Silicon IGBTs
p.889

Readiness of SiC MOSFETs for Aerospace and Industrial Applications
p.894

Experimental and Theoretical Study of 4H-SiC JFET Threshold Voltage Body Bias Effect from 25 °C to 500 °C
p.903

Processing and Prolonged 500 °C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect
p.908

Modelling of 4H-SiC VJFETs with Self-Aligned Contacts
p.913

Conduction Loss Reduction for Bipolar Injection Field-Effect-Transistors (BIFET)
p.917

A 500 °C Monolithic SiC BJT Latched Comparator
p.921

Design Impact on the Static and Short-Circuit Characteristics of SiC-SIT with Non-Uniformly Doped Channel
p.925

HomeMaterials Science ForumMaterials Science Forum Vol. 858Processing and Prolonged 500 °C Testing of 4H-SiC...

Processing and Prolonged 500 °C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Abstract:

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC’s with two levels of metal interconnect capable of prolonged operation at 500 °C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 °C. A 3-stage oscillator functioned for over 3000 hours at 500 °C in air ambient. Improved reproducibility remains to be accomplished.

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Periodical:

Materials Science Forum (Volume 858)

Pages:

908-912

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.858.908

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Online since:

May 2016

Authors:

David J. Spry*, Philip G. Neudeck, Liang Yu Chen, Dorothy Lukco, Carl W. Chang, Glenn M. Beheim, Michael J. Krasowski, Norman F. Prokop

Keywords:

High Temperature, Integrated Circuit, Interconnect, JFET

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