Silicon Epitaxial Layers for CCD and CMOS Imager Sensors : Limits and Challenges of the In-Line and Off-Line Metal Detection Techniques

G. Borionetti; S. Cox; P. Godio; I. Gohar; J. Pitney; M. Seacrist

doi:10.4028/www.scientific.net/SSP.131-133.467

Paper Titles

Nanoscale Imaging of CaCu₃Ti₄O₁₂ Dielectric Properties: The Role of Surface Defects
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Observation of Leakage Sites in High-k Gate Dielectrics in MOSFET Devices by Electron-Beam-Induced Current Technique
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Vacancies in Growth-Rate-Varied CZ Silicon Crystal Observed by Low-Temperature Ultrasonic Measurements
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Photoinduced Variation of Capacitance Characteristics of MDS Structures with Three-Layer SiN_x Dielectrics
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Silicon Epitaxial Layers for CCD and CMOS Imager Sensors : Limits and Challenges of the In-Line and Off-Line Metal Detection Techniques
p.467

New Opportunities to Study Defects by Soft X-Ray Absorption Fine Structure
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Femtosecond and Nanosecond Laser Pulse Crystallization of Thin a-Si:H Films on Non-Refractory Glass Substrates
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DLTS and PR Studies of Partially Relaxed InGaAs/GaAs Heterostructures Grown by MOVPE
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Electrical Activation and Carrier Compensation in Si and Mg Implanted GaN by Scanning Capacitance Microscopy
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Silicon Epitaxial Layers for CCD and CMOS Imager Sensors : Limits and Challenges of the In-Line and Off-Line Metal Detection Techniques

Abstract:

The need of an effective control of residual metal content inside the silicon epitaxial wafers is revamping for CCD and CMOS applications, which are very sensitive to small amount of heavy metals. The paper will discuss the strengths and the challenges associated to the integrated use of well known electrical techniques when metals like iron and molybdenum are present in concentration lower than 1E11 cm^3.