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Demonstrating SiC In Situ Rounded Trench Processing Technologies for Future Power Trench MOSFET Applications
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Addition of Transition Metal Ion CMP Slurry for Forming Ultra-Flat SiC Crystal
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HomeSolid State PhenomenaSolid State Phenomena Vol. 359High Mobility 4H-SiC P-MOSFET via Ultrathin ALD...

High Mobility 4H-SiC P-MOSFET via Ultrathin ALD B₂O₃ Interlayer between SiC and SiO₂

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Abstract:

This article presents an innovative approach to achieve a high channel mobility for 4H-SiCp-MOSFET via dielectric-semiconductor interface engineering involving atomic layer deposition(ALD) of ultrathin B₂O₃ and SiO₂ stacks. The application of ultrathin boron oxide via ALD introducesa highly manufacturable solution for the passivation of SiC interface. The interface states near valenceband reduces the channel mobility for SiC p-MOSFETs and increases the threshold voltage. Theintroduction of ultrathin B₂O₃ interlayer reduces the threshold voltage and improves the field effectmobility to 12.60 cm²/Vs while the p-MOSFET without the interlayer provides the mobility of 8.91cm²/Vs. This work also includes the optimization of the post-deposition annealing (PDA) conditionsspecific to ultrathin B₂O₃ and bulk SiO₂ dielectric stack to obtain high field effect channel mobilityfor SiO₂/SiC p-MOSFETs.

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Solid State Phenomena (Volume 359)

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171-180

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https://doi.org/10.4028/p-deE3Ln

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Online since:

August 2024

Authors:

Emran K. Ashik*, Veena Misra, Bong Mook Lee

Keywords:

Atomic Layer Deposition, CMOS, Density of Interface Traps, Field Effect Mobility, Leakage Current, MOSFET, Saturation Current, SiC, Threshold Voltage, Transfer Characteristics

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