Paper Titles

Investigation of Gettering Phenomena in Semiconductors by Simultaneous Charge Collection Microscopy and Cathodoluminescence
p.65

Implantation Induced Defect Modification in P Doped Bipolar Structures
p.73

The Properties of the Defects in Heavy Implanted Silicon
p.79

Defect Formation and Lateral Oxidation during Locos Processing
p.93

Defects and Their Influence on Parasitic Devices in Integrated Circuits
p.101

Volume Defect Formation in CZ SI Wafers and Related Electrical Effects
p.103

Buried Layer Processing for Advanced Bipolar Technology
p.111

Oxygen Precipitation in Silicon: Correlation of the Experimental Results Obtained with IR Spectroscopy, Preferential Etching and X-Ray Topography
p.119

Gettering of Fast Diffusing Impurities by Radiation Defects in III-V Semiconductors
p.127

HomeSolid State PhenomenaSolid State Phenomena Vols. 6-7Defects and Their Influence on Parasitic Devices...

Defects and Their Influence on Parasitic Devices in Integrated Circuits

Article Preview

Abstract:

You might also be interested in these eBooks

Gettering and Defect Engineering in Semiconductor Technology III

Info:

Periodical:

Solid State Phenomena (Volumes 6-7)

Pages:

101-102

DOI:

https://doi.org/10.4028/www.scientific.net/SSP.6-7.101

Citation:

Cite this paper

Online since:

January 1989

Authors:

R. Prejdova

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

© 1989 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation: