Papers by Keyword: InP

Abstract: The Indium Gallium Arsenide (InGaAs) based MOSFETs have been widely used in the research of high-speed devices with higher frequency. It has some application in the designing areas of power amplifiers. The InGaAs mainly have greater electron mobility and the lesser band gap in their compound makes them more suitable for developing high-speed devices. The Indium Gallium Arsenide compound-based MOSFETs are designed using the source/drain grown on a passive layer of Indium Phosphide substrate. This helps in reducing the power budget of the MOSFET and thereby reduces source and drain resistance. The re-grown layers over the bulk have serious issues such as parasitic capacitance and greater electrical field at the terminals of the gate along with the drain terminal. This results in a larger leakage current along with the terminals and thereby induces the degradation of the frequency of the application amplifiers. The high-ƙ dielectric along the gate terminal makes the device immune to leakage current for lesser frequency applications. The optimum material for the dielectric may be Hafnium (IV) Oxide – HfO₂ which has been used as a sidewall in the proposed InGaAs MOSFET design. The device simulation was carried out in a way to evaluate the characteristics of the proposed designs. The results were submissive to the conventional MOSFETs in terms of output capacitance over the source and drain terminals, leakage current in the drain terminal, and improved frequency parameters. The results also suggested that the sidewall design over the gate terminal constitutes the frequency improvement without losing the power and current characteristics.

Abstract: Group III–V compound semiconductors are attracting attention as new channel materials that have higher carrier mobility than Si. However, defects easily occur at the interface between the semiconductor and insulator film, which degrades performance. In an earlier study, we demonstrated that the interfacial properties of InP are degraded by the growth of In₂O₃ and that In₂O₃ grows better in water than in air. Therefore, it is necessary to suppress the growth of In₂O₃ to improve the interfacial properties of InP. In this work, we focused on functional water, which can be controlled by adjusting the water conditions, and investigated the growth behavior of In₂O₃ in functional water. As a result, we found that the growth is suppressed in the low-pH range and in hydrogen water. It is important that H⁺ ions reduce OH⁻ ions, which contributes to the reaction with InP.

Abstract: In this work, we investigated interfacial properties of InP, which is a typical group III-V compound used for semiconductors, by using a chemical-treated metal oxide semiconductor (MOS) capacitor. The interfacial properties of InP is more affected by interface state density than the surface roughness and is greatly affected by In₂O₃ in particular. Additionally, we evaluated In₂O₃ growth during 24-hour rinsing and air exposure and found that In₂O₃ on an InP surface grows larger during rinsing than during air exposure. To reduce In₂O₃, the rinse needs to be optimized.

Abstract: In this study of nanoscale etching for state-of-the-art device technology the importance of the nature of the surface oxide, is demonstrated for two III-V materials. Etching kinetics for GaAs and InP in acidic solutions of hydrogen peroxide are strikingly different. GaAs etches much faster, while the dependence of the etch rate on the H⁺ concentration differs markedly for the two semiconductors. Surface analysis techniques provided information on the surface composition after etching: strongly non-stoichiometric porous (hydr)oxides on GaAs and a thin stoichiometric oxide that forms a blocking layer on InP. Reaction schemes are provided that allow one to understand the results, in particular the important difference in etch rate and the contrasting role of chloride in the dissolution of the two semiconductors.

Abstract: The fabrication of thermally stable Schottky contacts with high barrier height (BH) to InP is one of the main challenges for InP-based device technology. CuNiTi/p-InP Schottky barrier diodes (SBDs) (25 dots) on p-InP substrate were fabricated by conventional vacuum deposition. Characteristic parameters such as BH and ideality factor (n) of as-deposited and annealed CuNiTi/p-InP diodes have been computed by thermionic emission (TE) theory from the forward-bias current-voltage (I-V) data, at room temperature and in dark. The value of BH and n varies from 0.452 to 0.631 eV and 1.172 to 2.815, respectively for the as-deposited SBDs. The results showed that characteristic parameters of CuNiTi/p-InP structures differ from one device to another even though they were identically prepared. Hence, to overcome these problems post thermal annealing was implemented since the annealing process can improve the interfacial quality as well as can induce a recrystallization of the gate metals. BH values for CuNiTi/p-InP SBDs have also varied from 0.765 to 0.804 eV, and ideality factor n from 1.161 to 1.253 after annealing at 500 °C for two minutes. As a result of the thermal annealing, it has been seen that the BH values of the annealed SBDs are larger than those of the as-deposited ones. A statistical study on the diode parameters has been made. The experimental BH and ideality factor distributions were fitted by a Gaussian distribution (GD) function. Lateral homogeneous BH (φ_hom.) values of 0.628 eV and 0.886 eV for the as-deposited and annealed CuNiTi/p-InP SBDs has been obtained from the φ_eff.-n plots by using Tung’s lateral inhomogeneity approach. An increment of 0.258 eV in the BH for the 500 °C annealing devices with respect to that of the as-deposited ones has been ascribed to the formation of the positively charged interface defects that electrically actives in the metal-semiconductor (MS) interface.

Abstract: We report the development of two epilayers namely the baseline highly strained channel and enhanced low gate leakage samples. The Hall data shows that the enhanced epilayer portraying higher sheet carrier concentration, but comparable carrier mobility in the 2-DEG layer, as compared to the baseline sample. The WinGreen simulation also conformed the enhanced epilayer advantages where wider Schottky barrier is observed and subsequently double carrier concentration is simulated in the channel. Both samples show low AuGe/Au Ohmic contact resistivity of approximately 0.16 Ω.mm. A tremendous advantage on 1 μm Schottky gate leakage is also recorded on enhanced epilayer where the leakage is more than seven times lower than that of the baseline sample. The resulted characteristics are much better than the reported submicron device, thus this device has find an important application in high-gain lossless transmission, especially in underwater optical communication system.

Abstract: This paper presents the linear modelling of high breakdown InP pseudomorphic High Electron Mobility Transistors (pHEMT) that have been developed and fabricated at the University of Manchester (UoM) for low noise applications mainly for the Square Kilometre Array (SKA) project. The ultra-low leakage properties of a novel InGaAs/InAlAs/InP pHEMTs structure were used to fabricate a series of transistor with total gate width ranging from 0.2 mm to 1.2 mm. The measured DC and S-Parameters data from the fabricated devices were then used for the transistors’ modelling. The transistors demonstrated to operate up to frequencies of 25 GHz. These transistors models are used in the design of Low Noise Amplifiers (LNAs) using fully Monolithic Microwave Integrated Circuit (MMIC) technology.

Abstract: Indium Antimonide (InSb) has the greater electron mobility and saturation velocity of any semiconductor. Also InSb detectors are sensitive between 1–5 μm wavelengths and it belongs to III-V [13] component. In this paper we compare the InSb with some other major components like Indium Phosphide (InP) and Gallium Arsenide (GaAs) which are also from same III-V group. The analysis was made using the simulation tool TCAD and using the properties and band structure of those materials we compare InSb with InP and GaAs. The results we proposed shows that InSb is best for ultra high speed and very low power applications.

Abstract: We propose a novel surface passivation of InP, to obtain the strong luminescence property and completely remove the surface state. InP is passivated by (NH4)₂S solution, then treated by rapid thermal annealing (RTA) at different temperatures. Compared with unannealing sample, the PL intensity is increased to 1.7 times. We adopt atomic layer deposition (ALD) of Al₂O₃ avoiding oxidizing gradually.

Abstract: We studied the effect of solvent vapours on the photoluminescent emission of self-assembled InP surface quantum dots (SQDs). Their room temperature near infrared emission undergoes a fully reversible intensity enhancement when the dots were exposed to vapours of polar solvents since polar molecules are likely to be adsorbed onto intrinsic surface states and thus reducing non radiative surface recombination. The shape and position of the emission band does not change. The observed effect is dependent on solvent type and concentration with linear law over a limited concentration range.