Papers by Keyword: InSb

Abstract: Indium Antimonide (InSb) has the greater electron mobility and saturation velocity of any semiconductor. Also InSb detectors are sensitive between 1–5 μm wavelengths and it belongs to III-V [13] component. In this paper we compare the InSb with some other major components like Indium Phosphide (InP) and Gallium Arsenide (GaAs) which are also from same III-V group. The analysis was made using the simulation tool TCAD and using the properties and band structure of those materials we compare InSb with InP and GaAs. The results we proposed shows that InSb is best for ultra high speed and very low power applications.

Abstract: The III-V semiconductors materials and in particularly Indium Phosphide are a promising candidates for the elaboration of high speed electronic compounds. The importance of the interface study is increasing considerably in the last years to understand, the mechanism of interface formations and to control perfectly the technology of the elaborated compounds.This study presents an electrical characterization of InP(p)/InSb/Al₂O₃/ Au structures in the range of temperature varying from the temperature of liquid nitrogen to the temperature of 400°K. In order to give the evolution of electrical parameters of these structures with temperature, we have realized Capacitance-Voltage measurements at high frequency for different temperatures. The found results show that there is dispersion in the accumulation region as function with temperature. The quantity of positive charges in the insulator is estimated to 1.37x10¹² atm/cm² at room temperature. This value decreases slightly with increasing temperature. It varies from 1.57x10¹² atm/cm² at 77°K to 1.12x10¹² atm/cm² at 400°K. The interface insulator/semiconductor of our samples presents a good electronical quality, the state density is equal to 4.10¹¹ eV^-1.cm^-2 at room temperature, this one increases from 4.7x10¹⁰ eV^-1.cm^-2 to 7.10¹¹ eV^-1.cm^-2 when temperature increases from 77°K to 400°K.

Abstract: To reduce the fracture probability of InSb infrared detector in thermal shock from room temperature to 77K, for 16×16 mesa structure InSb infrared focal plane array detector with underfill, here ANSYS, is employed to research the impacts from both indium bump diameters and heights on both Von Mises stress and its distribution. Simulation results show that when the diameters of indium bump increases from 20µm to 36µm in step of 4µm, the maximal Von Mises stress in the InSb chip increases slowly. Besides, when the height of indium bump increases from 8μm to 24μm in step of 8μm, the maximal Von Mises stress in the InSb chip reduces from 1200MPa to 1030MPa. Von Mises stress of Si readout integrated circuits is also much smaller than that of InSb chip.

Abstract: The first-principle quantum mechanical method was used to investigate the structures and electric properties of N-doped. Doping of N atom to clusters is found to be energetically quite favorable except for n=16. Different from bulk material, the LUMO-HOMO energy gaps of the In_nSb_n (n=6-12,14,16,24) clusters are enlarged by doping of N. The analysis of the electron density of the HOMO and LUMO states was performed to understand the behavior .

Abstract: We fabricated a thin film Peltier device based on an InSb film and a SbTe film. N-type InSb thin films were grown on sapphire (0001) substrate with InAsSb buffer layer by metalorganic vapor phase epitaxy, and P-type SbTe thin films were deposited on the substrate by electron beam evaporation. N-type and P-type films were separated on the substrate, and between them, a Au thin film was deposited by direct-current sputtering. We observed partial Peltier effect in the device.

Abstract: Based on viscoplastic Anand’s model, the structural stress of 8×8 InSb infrared focal plane array (IRFPA) detector is systemically analyzed by finite element method, and the impacts of design parameters including indium bump diameters, heights and InSb chip thicknesses on both Von Mises stress and its distribution are discussed in this manuscript. Simulation results show that the maximum stress existing in InSb chip reaches minimum with indium bump diameter 32μm. Under this condition, for the fixed indium height, as the InSb chip thickness reduces from 21µm to 9µm in step of 3µm, Von Mises stress maximum values of InSb chip seems increases gradually, and when the indium bump height reduces from 21µm to 9µm in step of 3µm, its maximum Von Mises stress increase at random increment, do not show certain rules, and indium bump height seems to have a comparable effect on stress value with InSb chip thickness. When indium diameter, height and InSb chip thickness are set to 32µm, 15µm, and 12µm, respectively, the maximal Von Mises value existing in InSb chip reaches minimal value 628MPa, simultaneously the stress distribution at the contacts areas is uniform and concentrated, and this structure is promising to avoid device invalidation.

Abstract: Based on viscoplastic Anand’s model, the structural stress of 8×8 InSb array detector with underfill dependent on indium bump sizes is systemically researched by finite element method. Simulation results show that as the diameters of indium bump decrease from 36μm to 20μm in step of 2μm, the maximum stress existing in InSb chip first reduces sharply, then increases flatly, and reaches minimum with indium bump diameter 32μm. The maximum stress in Si readout integrated circuit (ROIC) fluctuates at 320MPa with amplitude less than 50MPa, almost half stress in InSb chip. Yet the maximum stress in the indium bump array is almost unchangeable and keeps at 16.3MPa. When the height of indium bump increases from 9μm to 21μm in step of 6μm, the maximal stress in InSb chip first reduces sharply from 800MPa to 500MPa, then almost retains constant. With indium bump diameter 32μm and height 21μm, the maximum stresses in whole 8×8 InSb array detector reaches minimum 458MPa, besides, the stress distribution at the contacts areas is uniform and concentrated, the stress value is smallest and this structure is promising to avoid device invalidation.

Abstract: We present a systematic study of the effect of the sputtering parameters on the structure and composition of InSb film. The effect of the sputtering parameters on the crystallographic structure of InSb films is discussed in terms of the kinetic energy of the particle bombarding the growing film. Measurements of the chemical composition show that In to Sb concentration ratio increases with the increase of working pressure because Sb atoms are more rapidly thermalized by collisions with argon atoms during the transport process of the sputtered atoms. And the composition of the films is governed by the Sb re-evaporation process at the surface of the growing films. In to Sb concentration ratio is enhanced by increasing the substrate temperature (essentially) or RF power.

Abstract: Two-step method is used to research stress and its distribution in 64×64 InSb infrared focal plane array (IRFPA) employing finite element method. First, a small 8×8 InSb IRFPA is studied by changing indium bump diameters from 24μm to 36μm, with indium bump thickness 20μm and InSb thickness 10μm, the simulated results show that von Mises stress in InSb chip is dependent on indium bump diameters, the varying tendency is just like the letter V, here when indium bump diameters is set to 30μm, the smallest von Mises stress is achieved and its distribution in InSb chip is uniform at contacting areas. Then, InSb IRFPA array scale is doubled once again from 8×8 to 64×64 to learn the effect from array size, thus, the stress and its distribution of 64×64 InSb IRFPA is obtained in a short time. Simulation results show that von Mises stress maximum in InSb chip and Si readout integrated circuit almost do not increases with array scale, and the largest von Mises stress is located in InSb chips. Besides, stress distribution on the bottom surface of InSb chip is radiating, and decreases from core to four corners, and stress value at contacting area is smaller than those on its surrounding areas, contrary to stress distribution on top surface of InSb chip.

Abstract: Two-step method is used to research stress and its distribution in 64×64 InSb infrared focal plane array (IRFPA) employing finite element method. First, a small 8×8 InSb IRFPA is systemically studied by varying indium bump diameters, standoff heights and InSb chip thicknesses in suitable range, with indium diameter 30μm, thickness 9μm and InSb thickness 12μm, von Mises stress in InSb chip is the smallest and its distribution is uniform at contacting areas. Then, the sizes of InSb IRFPA is doubled once again from 8×8 to 64×64 to learn the effect from chip sizes, thus, the stress and its distribution of 64×64 InSb IRFPA is obtained in a short time. Simulation results show that von Mises stress maximum in InSb chip almost increases linearly with array scale, yet von Mises stress maximum in Si ROIC decreases slightly with increased array sizes, and the largest von Mises stress is located in InSb chips. Besides, stress distribution on the bottom surface of InSb chip is radiating, and decreases from core to four corners, and stress value at contacting area is smaller than those on its surrounding areas, contrary to stress distribution on top surface of InSb chip.