Collector Resistance of Accumulation-Subcollector Transistors for SOI SiGe BiCMOS Technology

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Abstract:

An analytical expression for collector resistance of a novel vertical SiGe partially-depleted accumulation-subcollector HBT on thin SOI is obtained. Supported by simulation result, the resistance decreases quickly with the increase of substrate-collector bias and improves the transit frequency dramatically. The model is found to be significant in the design and simulation of 0.13 μm millimeter wave SiGe SOI BiCMOS technology.

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5452-5456

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October 2011

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© 2012 Trans Tech Publications Ltd. All Rights Reserved

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