Detemining the Thickness of Barriers and Well of Resonance Tunneling Diodes by Specified I-V Characteristic

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In this paper, a method of determining physical dimension of Double Barrier Quantum Well (DBQW) of Resonance Tunneling Diodes (RTDs) is presented by using I-V characteristic governing on them. In this procedure, first we have used performance metrics related to RTDs I-V characteristic such as Peak to Valley Current Ratio (PVCR), peak current density (JP), valley current density (JV) and Voltage Swing (VS), and by some other arbitrary points, we have fitted a curve to the RTD current-voltage equation by MATLAB software. Then we have obtained the physical parameter of I-V equation and adjusted some of them with modification coefficients. Next, by choosing the material of barriers and the well and amount of doping, we have calculated the thicknesses of both. To review the mentioned method, the experimental result of I-V characteristic of the sample structure DBQW is considered and we have come to this idea that the dimensions gained out of this method are highly correlated with those of the experimental sample.

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5464-5470

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October 2011

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© 2012 Trans Tech Publications Ltd. All Rights Reserved

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[1] M. Bhattacharya and P. Mazumder, Augmentation of SPICE for Simulation of Circuits Containing Resonant Tunneling Diodes, IEEE Trans., vol. 20, no. 1, p.39–50‏ , January (2001).

DOI: 10.1109/43.905673

Google Scholar

[2] K‏. J . Chen, T‏. Waho, K. Maezawa, M. Yamamoto, An Exclusive-OR Logic Circuit Based on Controlled Quenching of Series-Connected Negative Differential Resistance Devices, IEEE lett., vol. 17, no. 6, June (1996).

DOI: 10.1109/55.496467

Google Scholar

[3] K. J. Chen, G, Niu, Logic Synthesis and Circuit Modeling of a Programmable Logic Gate Based on Controlled Quenching of Series-Connected Negative Differential Resistance Devices, IEEE, vol. 38, no. 2, February (2003).

DOI: 10.1109/jssc.2002.807403

Google Scholar

[4] P‏. Mazumder, S‏. Member, S‏. Kulkarni, M‏. Tacharya, J‏. Sun, I. HADDAD, ‏ Digital Circuit Applications of‏ Resonant‏ Tunneling Devices, ‏, IEEE , vol. 86, no. 4, April (1998).

Google Scholar

[5] J. Meiling Wang, B. Sukhwani, U. Padmanabha, D. Ma, K. Sinha, Simulation and Design of Nano circuits With Resonant Tunneling Devices, IEEE Trans. , vol. 54, no. 6 , june (2007).

DOI: 10.1109/tcsi.2007.895529

Google Scholar

[6] T. Broekaert, B. Brar, J. Paul A. van der Wagt, Alan C. Seabaugh, Frank J. Morris, Theodore S. Moise , Edward A. Beam, , Gary A. Frazier, A Monolithic 4 Bit 2-Gsps Resonant Tunneling Analog-to Digital Converter, IEEE‏., vol. 33, no. 9, September (1998).

DOI: 10.1109/4.711333

Google Scholar

[7] Y‏. Zheng, Ch‏. Huang" Complete Logic Functionality of Reconfigurable RTD Circuit Elements, " IEEE Trans., vol. 8, no. 5, September (2009).

DOI: 10.1109/tnano.2009.2016563

Google Scholar

[8] J. N. Schulman, H. J. De Los Santos, and D. H. Chow, Physics based RTD Current-Voltage Equations, IEEE Electron Device Lett. ‏ , vol. 17, no. 5, p.220–222, May (1996).

DOI: 10.1109/55.491835

Google Scholar

[9] L. Chang, L. Esaki, R. Tsu, Resonant Tunneling In Semiconductor Double Barriers, Appl. Phys. Lett., vol. 24, no. 12, p.593. 595, June (1974).

DOI: 10.1063/1.1655067

Google Scholar

[10] T. H. Kuo, H. C. Lin, U. Anandakrishnan, R. C. Potter, D. Shupe, Large-signal resonant tunneling diode model for SPICE3 simulation, IEEE Int. Electron Devices Meeting Tech. Dig., p.567–570 , December (1989).

DOI: 10.1109/iedm.1989.74346

Google Scholar

[11] C. Y. Huang, J. E. Morris, Y. K. Su, and T. H. Kuo, New Method Of Modeling A Multi peak Resonant Tunneling Diode, IEEE Electron Device Lett‏., vol. 30, p.1012–1013, June (1994).

Google Scholar

[12] M. Shieh, H. Chang Lin. Modeling Hysteretic Current-Voltage Characteristics for Resonant Tunneling Diodes, ‏, IEEE Trans. , vol. 14 , no. 9 , September (1995).

DOI: 10.1109/43.406702

Google Scholar

[13] R. P. Santoro, Piecewise-linear modeling of I–V characteristics with SPICE, IEEE Trans. , vol. 38, p.107–117, May (1995).

DOI: 10.1109/13.387211

Google Scholar

[14] Z. Yan and M. J. Deen, New RTD Large-Signal DC Model Suitable For PSPICE, IEEE Trans. , vol. 14, no. 2, p.167–172, February (1995).

DOI: 10.1109/43.370427

Google Scholar

[15] D. Neculoiu and T. Tebeanu, SPICE Implementation Of Double Barrier Resonant Tunnel Diode Model, " Proc. Int. Semiconductor Conf., CAS, 96 Part 1, vol. 1, p.181–184 , (1996).

DOI: 10.1109/smicnd.1996.557334

Google Scholar

[16] P. See, , D. J. Paul, B. Holländer, S. Mantl, I. V. Zozoulenko, K. -F. Berggren. High Performance Si/Si1 xGex Resonant Tunneling Diodes, IEEE Electron Device Lett, vol. 22, no. 4, Apr. (2001).

DOI: 10.1109/55.915607

Google Scholar

[17] P. See , D. J. Paul, The Scaled Performance of Si/Si1xGex Resonant Tunneling Diodes, IEEE Electron Device Lett, vol. 22, no. 12, Dec., (2001).

DOI: 10.1109/55.974584

Google Scholar

[18] Ryota Ito, Masao Sakuraba, Junichi Murota, Hole Tunneling Properties in Resonant Tunneling Diodes with Si/Strained SiO. 8Geo. 2 Heterostructures Grown on Si(100) by Low-Temperature Ultraclean LPCVD" , IEEE t, vol. 22, no. 4, Apr. (2006).

DOI: 10.1109/istdm.2006.246487

Google Scholar

[19] Ch. Xiong, Y. Wang, P. i Chen, Z. Yu, Fabrication of p-well Resonant Tunneling Diode based on SiGe/Si and its DC-parameter extraction , Elsevier , vol. 7, pp.379-382, October (2004).

DOI: 10.1016/j.mssp.2004.09.016

Google Scholar

[20] D. A. Neamen, An Introduction to Semiconductor Devices. Mc crow-Hill, (2006).

Google Scholar