Crystal Originated Defect Monitoring and Reduction in Production Grade SmartSiC™ Engineered Substrates

Enrica Cela; Kassem Alassaad; Audrey Chapelle; Séverin Rouchier; Walter Schwarzenbach; Alexis Drouin; Valentine Chagneux; Marcin Zielinski; Christophe Maleville

doi:10.4028/p-S85vkE

Paper Titles

The Role of Defects on SiC Device Performance and Ways to Mitigate them
p.51

Emission of Trapped Electrons from the 4H-SiC/SiO₂-Interface via Photon-Irradiance at Cryogenic Temperatures
p.61

SiC MOSFET Gate Oxide Quality Improvement Method in Furnace Thermal Oxidation with Lower Pressure Control
p.67

Investigating Dislocation Arrays Induced by Seed Scratches during PVT 4H-SiC Crystal Growth Using Synchrotron X-Ray Topography
p.71

Crystal Originated Defect Monitoring and Reduction in Production Grade SmartSiC™ Engineered Substrates
p.81

Analysis of Lattice Damage in 4H-SiC Epiwafers Implanted with High Energy Al Ions at Elevated Temperatures
p.87

Near-Interface Defect Decomposition during NO Annealing Analyzed by Molecular Dynamics Simulations
p.93

Differences between Polar-Face and Non-Polar Face 4H-SiC/SiO₂Interfaces Revealed by Magnetic Resonance Spectroscopy
p.99

Investigation of BPD Faulting under Extreme Carrier Injection in Room vs High Temperature Implanted 3.3kV SiC MOSFETs
p.105

HomeDefect and Diffusion ForumDefect and Diffusion Forum Vol. 434Crystal Originated Defect Monitoring and Reduction...

Crystal Originated Defect Monitoring and Reduction in Production Grade SmartSiC™ Engineered Substrates

Abstract:

Power devices electronics based on Silicon Carbide (SiC) are emerging as a breakthrough technology for various applications. The link between the quality of SiC substrates and device performance has been widely discussed [1]. Smart Cut™ technology offers the opportunity to integrate a high quality SiC layer on a low resistivity handle wafer. Moreover the crystal quality of a single donor wafer can be replicated multiple times to provide an epitaxy-ready substrate in high volume [2]. Nevertheless, some extended grown-in defects of SiC starting material, like micro-pipes or bulk inclusions, may generate surface defects called "Crystal Originated Defects" (COD) on transferred layers. This paper explains how SmartSiC™ defect density can be reduced by limiting the number of extended defects on donor wafers. Specific inspection recipes were developed to monitor the starting material and the replicated engineered substrate: COD root-causes and effects were analyzed. We demonstrated how a well-suited quality control of donor wafers plays a major role to guarantee defect-free SmartSiC™ wafers.

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