Novel Source Heterojunction Structures with Relaxed-/Strained-Layers for Quasi-Ballistic CMOS Transistors

Tomohisa Mizuno; Mitsuo Hasegawa; Toshiyuki Sameshima

doi:10.4028/www.scientific.net/KEM.470.72

Paper Titles

Collective Electron Tunneling Model in Si-Nano Dot Floating Gate MOS Structure
p.48

Electronic Structure and Spin-Injection of Co-Based Heusler Alloy/ Semiconductor Junctions
p.54

First-Principles Calculations of the Dielectric Constant for the GeO₂ Films
p.60

Nanosize Electronics Material Analysis by Local Quantities Based on the Rigged QED Theory
p.66

Novel Source Heterojunction Structures with Relaxed-/Strained-Layers for Quasi-Ballistic CMOS Transistors
p.72

Effect of Al₂O₃ Deposition and Subsequent Annealing on Passivation of Defects in Ge-Rich SiGe-on-Insulator
p.79

Controlled Synthesis of Carbon Nanowalls for Carbon Channel Engineering
p.85

Resistive Memory Utilizing Ferritin Protein with Nano Particle
p.92

Atomically Controlled Plasma Processing for Group IV Quantum Heterostructure Formation
p.98

HomeKey Engineering MaterialsKey Engineering Materials Vol. 470Novel Source Heterojunction Structures with...

Novel Source Heterojunction Structures with Relaxed-/Strained-Layers for Quasi-Ballistic CMOS Transistors

Abstract:

We have studied new abrupt-source-relaxed/strained semiconductor-heterojunction structures for quasi-ballistic complementary-metal-oxide-semiconductor (CMOS) devices, by locally controlling the strain of a single strained semiconductor. Appling O+ ion implantation recoil energy to the strained semiconductor/buried oxide interface, Raman analysis of the strained layers indicates that we have successfully relaxed both strained-Si-on-insulator (SSOI) substrates for n-MOS and SiGe-on-insulator (SGOI) substrates for p-MOS without poly crystallizing the semiconductor layers, by optimizing O+ ion implantation conditions. As a result, it is considered that the source conduction and valence band offsets EC and EV can be realized by the energy difference in the source Si/channel-strained Si and the source-relaxed SiGe/channel-strained SiGe layers, respectively. The device simulator, considering the tunneling effects at the source heterojunction, shows that the transconductance of sub-10 nm source heterojunction MOS transistors (SHOT) continues to increase with increasing EC. Therefore, SHOT structures with the novel source heterojunction are very promising for future quasi-ballistic CMOS devices.