An Approach to Predict 4H-SiC Wafer Bending after Back Side Thinning by Substrate Resistivity Analysis

Nicolo Piluso; Stefania Rinaldi; Simona Lorenti; Anna Bassi; Andrea Severino; Salvo Coffa

doi:10.4028/www.scientific.net/MSF.1004.57

Paper Titles

Modified Hot-Zone Design of Growth Cell for Reducing the Warpage of 6”-SiC Wafer
p.32

Progress in Bulk 4H SiC Crystal Growth for 150 mm Wafer Production
p.37

Investigation of Dislocation Behavior at the Early Stage of PVT-Grown 4H-SiC Crystals
p.44

Investigation on the Threading Dislocations Formed by Lattice Misfits during Initial Stage of Sublimation Growth of 4H-SiC
p.51

An Approach to Predict 4H-SiC Wafer Bending after Back Side Thinning by Substrate Resistivity Analysis
p.57

X-Ray Topography Characterization of Large Diameter AlN Single Crystal Substrates
p.63

Highly Reliable 4H-SiC Epitaxial Wafer with BPD Free Recombination-Enhancing Buffer Layer for High Current Applications
p.71

Improvement of Repeatability on N-Type 4H-SiC Epitaxial Growth by High Speed Wafer Rotation Vertical CVD Tool
p.78

Achievement of Low Carrier Concentration of High-Uniformity SiC Films Grown by High Speed Wafer Rotation Vertical CVD Tool
p.84

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An Approach to Predict 4H-SiC Wafer Bending after Back Side Thinning by Substrate Resistivity Analysis

Abstract:

It is commonly thought that, in the development of SiC power devices with low on-state resistance (R_on), several critical processes in the device fabrication line can strongly impact the final warpage of wafers. High warpage would lead to bad definition of masks, preventing uniform deposition of resist materials and disturbing the normal handling procedures. All these factors would then result in a potential decrease of the electrical yield of the devices, especially for MOSFETs. This study reveals the lack of correlation between critical line processes such as epitaxial growth, oxidations, ion implantations, annealing processes with the final bending of wafers. Conversely, a strong dependence with the resistivity of the substrates is observed. A new parameter defined as RMR (Resistivity Modulation Rate) is taken proposed and, together with the starting value of ingot resistivity, this parameter shows a strong relationship with the final warpage after wafer thinning. A safe region having warpage low enough to allow the workability of the wafers is found.