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Investigation on Bipolar Degradation Caused by In-Grown Stacking Fault in 3.3kV SiC-MOSFET
Abstract:
This study investigates the role of in-grown stacking faults (SF) in the bipolar degradation of 3.3 kV SiC-MOSFETs, emphasizing their significant contribution to both on-resistance (VDSon) and leakage current (IDSX) degradation. A high current stress was applied to over 1,500 chips, resulting in 72 degraded devices, with 45 exhibiting notable IDSX degradation. A detailed analysis revealed that most IDSX degraded chips contained bar-shaped in-grown SFs, suggesting a correlation between these defects and leakage current degradation. These findings indicate that peculiar basal plane dislocations associated with in-grown SFs may be critical contributors to IDSX degradation, indicating the need for further research to elucidate the mechanisms behind this degradation in SiC-MOSFETs.
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11-17
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May 2026
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