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High-K: Latest Developments and Perspectives

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Abstract:

The paper reviews recent progress and current challenges in implementing high-k dielectrics in microelectronics. Logic devices, non-volatile-memories, DRAMs and low power mixedsignal components are found to be the technologies where high-k dielectrics are implemented or will be introduced soon. Two gate architectures have to be considerd: MOS with metal as gate electrode and MIM. In particular, Hf-silicates for logic and NVM devices in conventional MOS architecture and ZrO2 for DRAM cells in MIM architecture are discussed.

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Periodical:

Materials Science Forum (Volumes 573-574)

Pages:

165-180

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.573-574.165

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Online since:

March 2008

Authors:

Anton J. Bauer, Martin Lemberger, Tobias Erlbacher, Wenke Weinreich

Keywords:

Capping Layer, Hf-Silicate, High-k, Interface Layer, Memory, SONOS

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