Doping Strategies for FinFETs

Bartek J. Pawlak; Ray Duffy; An De Keersgieter

doi:10.4028/www.scientific.net/MSF.573-574.333

Paper Titles

Vacancy Engineering – An Ultra-Low Thermal Budget Method for High-Concentration 'Diffusionless' Implantation Doping
p.295

Ultra-Shallow Junction Formation Using Rapid Thermal Processing
p.305

Ultra-Rapid Thermal Process for ULSIs
p.319

Advanced Millisecond Annealing Technologies and its Applications and Concerns on Advanced Logic LSI Fabrication Processes
p.325

Doping Strategies for FinFETs
p.333

RTP Requirements for CMOS Integration of Dual Work Function Phase Controlled Ni-FUSI (Fully Silicided) Gates with Simultaneous Silicidation of nMOS (NiSi) and pMOS (Ni-Rich Silicide) Gates on HfSiON
p.341

A Short History of Pattern Effects in Thermal Processing
p.355

Conduction Heating in RTP Fast, and Pattern-Independent
p.375

Advanced Annealing Schemes for High-Performance SOI Logic Technologies
p.387

HomeMaterials Science ForumMaterials Science Forum Vols. 573-574Doping Strategies for FinFETs

Doping Strategies for FinFETs

Abstract:

In this paper the formation strategies for source and drain regions in vertical FinFETs are discussed. The technology challenges are very different than for planar bulk devices. Here the main doping approaches are presented with their advantages and drawbacks. Source/drain formation by ion implantation, and deposition techniques are discussed with respect to process simplicity, and device requirements.