Implementation of Sub-Resolvable Features for Precise Electrical Characterization of SiC Gate Oxide Parameters

J. Jay McMahon; Liang Chun Yu; Jody Fronheiser; J.T. Elson; Roger Kovalec; Jim Kretchmer; Vinayak Tilak

doi:10.4028/www.scientific.net/MSF.717-720.797

Paper Titles

Controlling Characteristics of 4H-SiC(0001) p-Channel MOSFETs Fabricated on Ion-Implanted n-Well
p.781

Two-Dimensional Roughness Growth at Surface and Interface of SiO₂ Films during Thermal Oxidation of 4H-SiC(0001)
p.785

Effects of Surface Morphological Defects and Crystallographic Defects on Reliability of Thermal Oxides on C-Face
p.789

Frequency-Dependent Charge Pumping on 4H-SiC MOSFETs
p.793

Implementation of Sub-Resolvable Features for Precise Electrical Characterization of SiC Gate Oxide Parameters
p.797

Identification of Slow States at the SiO₂/SiC Interface through Sub-Bandgap Illumination
p.801

Effect of Nuclear Scattering Damage at SiO₂/SiC and Al₂O₃/SiC Interfaces – a Radiation Hardness Study of Dielectrics
p.805

High Temperature Reliability of High-k/SiC MIS Hydrogen Sensors
p.809

Shallow Incorporation of Nitrogen in HPSI 4H-SiC through the Laser Enhanced Diffusion Process
p.813

HomeMaterials Science ForumMaterials Science Forum Vols. 717-720Implementation of Sub-Resolvable Features for...

Implementation of Sub-Resolvable Features for Precise Electrical Characterization of SiC Gate Oxide Parameters

Abstract:

We describe fabrication of Van der Pauw (VDP) structures for characterization of gate oxides grown on 4H SiC epi surfaces. Implementation of sub-resolvable features (SRF) as a corner compensation mechanism is analyzed with challenges and advantages presented. Results of on-wafer screening tests suggest that implementation of SRFs widens tolerance for misalignment, producing similar yield between uncompensated VDPs with 0.2 micron overlap and compensated VDPs with 0.1 micron overlap for structures with best alignment. Optimization of SRFs for SiC could be an attractive option for extending lithographic capability in advanced devices.

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Silicon Carbide and Related Materials 2011

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Periodical:

Materials Science Forum (Volumes 717-720)

Pages:

797-800

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.717-720.797

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Online since:

May 2012

Authors:

J. Jay McMahon, Liang Chun Yu, Jody Fronheiser, J.T. Elson, Roger Kovalec, Jim Kretchmer, Vinayak Tilak

Keywords:

Gate Oxide, Lateral MOSFETs, Sub-Micron Lithography

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References

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