Identification of Slow States at the SiO2/SiC Interface through Sub-Bandgap Illumination

Christopher M. Spargo; Benjamin J.D. Furnival; R.M. Mahapatra; J.P. Goss; Nicolas G. Wright; Alton B. Horsfall

doi:10.4028/www.scientific.net/MSF.717-720.801

Paper Titles

Two-Dimensional Roughness Growth at Surface and Interface of SiO₂ Films during Thermal Oxidation of 4H-SiC(0001)
p.785

Effects of Surface Morphological Defects and Crystallographic Defects on Reliability of Thermal Oxides on C-Face
p.789

Frequency-Dependent Charge Pumping on 4H-SiC MOSFETs
p.793

Implementation of Sub-Resolvable Features for Precise Electrical Characterization of SiC Gate Oxide Parameters
p.797

Identification of Slow States at the SiO₂/SiC Interface through Sub-Bandgap Illumination
p.801

Effect of Nuclear Scattering Damage at SiO₂/SiC and Al₂O₃/SiC Interfaces – a Radiation Hardness Study of Dielectrics
p.805

High Temperature Reliability of High-k/SiC MIS Hydrogen Sensors
p.809

Shallow Incorporation of Nitrogen in HPSI 4H-SiC through the Laser Enhanced Diffusion Process
p.813

High Dose Al⁺ Implanted and Microwave Annealed 4H-SiC
p.817

HomeMaterials Science ForumMaterials Science Forum Vols. 717-720Identification of Slow States at the SiO2/SiC...

Identification of Slow States at the SiO₂/SiC Interface through Sub-Bandgap Illumination

Abstract:

We show that it is possible to obtain information relating to deep level interface traps, or so called ‘slow states’, by using the photo-CV characterisation method. Sub-bandgap illumination has been chosen in order to avoid band-to-band excitation for the creation of minority carriers. This enables information to be extracted from trapping states at the SiO2/SiC interface that are energetically deep within the band gap. Empirical observations of deep level trapping states with life times in the order of tens of hours are reported and the interface trap density as a function of energy has been extracted using the Terman method. Characterisation of these interface states will aid the development of new fabrication processes, with the aim of reducing the interface trap density to the same level as that of the SiO2/Si interface and facilitating the production of higher quality SiC based devices.