Materials Science Forum Vols. 740-742

Abstract: We utilize the recently suggested capture-emission-time (CET) maps for the first time for SiC technologies. CET maps are a very powerful characterization technique which allow the elegant and comprehensive analysis of oxide/interface traps at or near the semiconductor-dielectric interface and were originally developed to characterize degradation of Si based MOSFETs. For as-processed SiC MOSFETs we present first results of the SiC-SiO2 interface using CET maps. We suggest that oxide traps are mainly responsible for the instability in SiC MOSFETs. Furthermore we state that the large time constants and the temperature activation of the traps in SiC MOSFETs can be consistently explained when accounting for multi-phonon processes for the microscopic charge exchange. A recently suggested model including such microscopic transitions is applied to SiC MOSFETs and shown to reproduce our experimental data with high accuracy for a large temperature range.

Abstract: Diamond surfaces with suitable adsorbed chemical species can exhibit both negative and positive electron affinities, arising from the complex electrostatic interplay between adsorbates and surface carbon atoms of diamond lattice. We presents the results of density functional calculations into the energetics and the electron affinity of diamond (100) surfaces terminated with the oxides of selected transition metals. We find that for a correct stoichiometry, oxides of transition metals, such as Ti and Zn, exhibit a large negative electron affinity of around 3 eV. The desorption of transition metal oxides is found to be highly endothermic. We therefore propose that transition metal oxides are promising for the surface coating of diamond-based electron emitters, as these exhibit higher thermal stability in comparison to the commonly used CsO terminations, while retaining the advantage of inducing a large negative electron affinity.

Abstract: The p-type doping of high purity semi-insulating 4H-SiC by Al⁺ ion implantation and a conventional thermal annealing of 1950 °C/5 min has been studied for implanted Al concentration in the range of 1 x10¹⁹ - 8 x 10²⁰ cm^-3 (0.36 μm implanted thickness). Sheet resistance in the range of 1.6 x 10⁴ to 8.9 x10² Ω, corresponding to a resistivity in the range of 4.7 x 10^-1 to 2.7 x 10^-2 Ωcm for increasing implanted Al concentration have been obtained. Hall carrier density and mobility data in the temperature range of 140–600 K feature the transition from a valence band to an intra-band conduction for increasing implanted Al concentration. The specific contact resistance of Ti/Al contacts on the 5 x10¹⁹ cm^-3 Al implanted specimen features a thermionic field effect conduction with a specific contact resistance in the 10^-6 Ωcm2 decade.

Abstract: In this study, we present the results of alloying nickel as ohmic contact material to n-type 4H-SiC via a continuous wave fiber laser with different laser beam powers and processing times. The laser system exhibits an emitting wavelength of 1070 nm and a beam propagation factor M2 smaller than 1.1. Contact resistance was determined by current-voltage measurement using the two-terminal contact resistance method. The results indicate that a laser beam power of at least 100 W is mandatory to initialize contact silicidation. Although the contact resistance is improvable by longer processing times, our experiments outline the much higher impact of laser beam power to contact silicidation compared with processing time. For laser beam powers of 300 W and processing times of 0.5 s a contact resistance of 6.5 , comparable to contacts alloyed in a lamp heated furnace at 910 °C for 2 min with a contact resistance of 10.3 , was achieved.

Abstract: This paper reports on a structural and electrical analysis of nickel oxide (NiO) films grown both on AlGaN/GaN heterostructures and on 4H-SiC epilayers. The films were grown by metal organic chemical vapor deposition (MOCVD). The structural analysis showed epitaxially oriented films over the hexagonal substrates. The electrical characterization of simple devices onto AlGaN/GaN heterostructures enabled to demonstrate a dielectric constant of 11.7 and a reduction of the leakage current in insulated gate structures. On the other hand, epitaxial NiO films grown onto 4H-SiC epilayers exhibited the presence of an interfacial SiO₂ layer and twinned NiO grains, and a lower dielectric constant.

Abstract: A novel trench JBS structure has been developed to reduce the electrical field at the Schottky interface. Compared to the conventional planar JBS structure, the new design has reduced the reverse leakage current by 1 order of magnitude at rated voltage. The much reduced field at the Schottky interface allows an increase in the drift doping concentration, which enables a significant chip size reduction on next generation SiC Schottky diodes. This progress makes it possible to fabricate high current rating (>50 A) SiC diodes for module applications.

Abstract: We have tried to fabricate a super junction (SJ) structure in SiC semiconductors by the trench-filling technique. After the deep trench formation by dry etching, epitaxial layer is grown over the trench surface. Doping profile of the embedded p-type epitaxial region between the trenches is evaluated by a scanning spreading resistance microscopy (SSRM). The SSRM result reveals that the doping profile is not uniform and there exists a low concentration region along the trench side-wall. Based on the SSRM result, two-dimensional device simulations are performed using pn-type test structures with the non-uniform SJ drift layer. The simulation result shows that blocking voltage of the test structure can be optimized and becomes comparable to that of the ideal one by adjusting the concentration design of the embedded layer to balance the total charge in SJ structure.

Abstract: Guaranteeing the reliability of gate oxides is one of the most important topics to realize regarding the SiC power MOSFET. In the case of trench MOSFET, since the gate oxides are formed on the trench sidewall, the damage and roughness on the trench sidewall can affect the lifetime of the gate oxides. Generally speaking, damage removal treatment is processed after trench dry etching in most cases. In Si processes, sacrificial oxidation, H₂ anneal and CDE (Chemical Dry Etching) are adopted commonly. In the case of SiC processes, sacrificial oxidation, H₂ anneal, and SiH₄/Ar anneal have been reported. Neverthless CDE which applied to SiC trench MOSFET has few precedents. We clarified the effect of CDE as a damage removal process. CDE has the effect of flattening the trench sidewall, and CDE makes the lifetime of gate oxides improve. CDE is an effective process for the reliability of SiC trench MOSFET.

Abstract: We performed deep trench filling by using epitaxial SiC growth. It was found that the trench filling condition depend on trench width. A high growth temperature was needed to fill a narrow trench and a low growth temperature was needed to fill a wide trench structure. We optimized the filling condition and successfully filled 7μ m deep and 2 μm wide trench without void formation. We also investigated the 2D doping distribution of the filled area by SSRM. As a result, it is found that the existence of a sub-trench was related to the generation of a doping distribution in the filled area. The trench filling mechanism and doping distribution are discussed.

Abstract: A method for formation of enhanced ohmic contacts on SiC for operation under adverse conditions has been studied. Ni, NiSi2 and Si ohmic contacts were prepared and tested at 300°C on air for hundreds of hours. NiSi2 and Si showed high thermal stability. Moreover, also the so called secondary contacts showed preserved good electrical and structural properties in the thermal test. The secondary ohmic contacts are formed from original ohmic contacts after they are etched off and replaced with new ones. Secondary ohmic contacts originate in a certain surface modification of the SiC substrate created during high temperature annealing of the original contact. All applied contact materials enable formation of quality secondary contacts which is especially noteworthy at NiSi2 and Si. The results bring new SiC device design perspectives with the application of secondary ohmic contacts. For example, the contact is designed so that the primary contact makes as good ohmic behavior as possible with the secondary contact providing further important contact properties as high corrosion resistance, wire-bonding simplicity etc.