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Paper Title Page
Abstract: In this paper the epitaxial process with chloride precursors has been described. In particular it has been shown that the growth rate can be increased to about 100 μm/h but higher growth rate can be difficult to reach due to the limited surface diffusion at the usual temperature of SiC epitaxy. This process gives several advantages because it gives the opportunity to increase the throughput and consequently to reduce the cost of epitaxy, using new reactor structures, and to reduce several kind of defects (Basal Plane Dislocations, Stacking Faults, Threading Dislocations) and to decrease the surface roughness at the same time.
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Abstract: We demonstrate on-axis homoepitaxial growth of 4H-SiC(0001) PiN structure on 3-inch wafers with 100% 4H polytype in the epilayer excluding the edges. The layers were grown with a thickness of 105 µm and controlled n-type doping of 4 x 1014 cm-3.The epilayers were completely free of basal plane dislocations, in-grown stacking faults and other epitaxial defects, as required for 10 kV high power bipolar devices. Some part of the wafer had a lifetime enhancement procedure to increase lifetime to above 2 s using carbon implantation. An additional step of epilayer polishing was adapted to reduce surface roughness and implantation damage.
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Abstract: This work deals with the study of the Selective Epitaxial Growth (SEG) of SiC using Vapour-Liquid-Solid (VLS) transport at temperature ≤ 1100°C. Focus was made on the nucleation step by observing the evolution of the growth as a function of growth duration with variable Si-content of the Al-Si liquid phase. Addition of propane during the initial heating ramping-up not only avoids liquid de-wetting but also allows good starting of the epitaxial growth. Additionally, it was observed that, by increasing the silicon content in the liquid, the morphology of the grown SiC is improved, and no parasitic Al4C3 inclusions are formed. Limiting the growth rate is found to be essential for getting controlled smooth growth process.
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Low Resistivity, Thick Heavily Al-Doped 4H-SiC Epilayers Grown by Hot-Wall Chemical Vapor Deposition
Abstract: By using hot-wall CVD method, thick heavily Al-doped 4H-SiC epilayers (~90 μm) were grown on 3-inches 4H-SiC wafers. Around the solubility limit, the incorporation behaviors of Al into 4H-SiC were investigated by varying the growth conditions. Among the samples having smooth surfaces, the maximum Al dopants concentration of 3.5×1020 cm-3 and the minimum resistivity of 16.5 mΩcm were achieved. The results of Hall-effect measurement demonstrate that, along with the increase of Al doping level, the activation ratio of Al dopants gradually increases from several percent up to 100% where the Al dopants concentration is 1.5×1020 cm-3.
181
Abstract: Homoepitaxial layers of fluorescent 4H-SiC were grown on 4 degree off-axis substrates by sublimation epitaxy. Luminescence in the green spectral range was obtained by co-doping with nitrogen and boron utilizing donor-acceptor pair luminescence. This concept opens possibilities to explore green light emitting diodes using a new materials platform.
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Abstract: Reduction of threading screw dislocation without polytype transformation from 4H-SiC was performed by the combination of step-flow growth and spiral growth. On a vicinal 4H-SiC seed crystal, threading screw dislocations are converted to Frank-type stacking faults by step-flow during solution growth. As the growth proceeds, the defects are excluded to the crystal. Thus utilizing the conversion, high quality SiC crystal growth without threading screw dislocations is expected to achieve. However, at the same time, polytype transformation is caused by the occurrence of 2D nucleation. By using the special shape of seed crystal, we successfully grew high quality 4H-SiC crystal without threading screw dislocation and polytype transformation.
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Abstract: We grew epitaxial layers on 3-inch epitaxial wafers with a vicinal off-angle, using a horizontal hot-wall chemical vapor deposition system that had a reactor capacity of 3 x 150 mm. Uniformity (σ/mean) of thickness and carrier concentration as small as 1.7% and 5.6%, respectively, were successfully obtained. We succeeded in decreasing triangular surface defects and polytype inclusions by increasing the growth temperature and lowering the C/Si ratio. In addition, I-V characteristics of Schottky barrier diodes on an epitaxial layer showed that a high blocking voltage of 960 V and a low leakage current of less than 1 x 10-6 A/cm2 were obtained with a yield of 78%.
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Abstract: The production of 150 mm-diameter SiC epi-wafers is the key to the spread of SiC power devices. Besides, step-bunching free surface leads to high-performance devices. We have developed the production technology of the epitaxial growth with smooth surface morphology for 4º off Si-face 4H-SiC epitaxial layers on 150 mm diameter substrates. The various area observations of the surface by optical surface analyzer, confocal microscope and atomic force microscope revealed that there was no conventional step-bunching in whole wafer surface. While creating step-bunching free surface is more difficult for thicker epilayer growth, we have achieved step-bunching free surface for 30-μm thick epilayer on a 150 mm diameter substrate. The typical values of thickness uniformity of the 30μm-thick epilayer are 0.5% (σ/mean) and 1.7% (range/mean). A few interfacial dislocations (IDs) were detected for the 150 mm-diameter epi-wafer by reflection X-ray topography. We have succeeded in removal of IDs by the optimized growth condition.
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Abstract: The growth of homoepitaxial layers on off-oriented 6H-SiC substrates proceeds via step flow growth. Such epilayers can exhibit irregularities like step bunching, splicing or crossover of steps. The effects of the substrate off-orientation and growth temperature show an influence on formation of surface irregularities. The mean features seem to be given by the growth mode competition of two-dimensional growth to the step-flow growth.
201
Abstract: In order to understand the influence of the Cl/Si ratio on the morphology of the low-temperature chloro-carbon epitaxial growth, HCl was added during the SiCl4/CH3Cl growth at 1300°C. Use of higher Cl/Si ratio allowed only modest improvements of the growth rate without morphology degradation, which did not go far beyond what has been achieved previously by optimizing the value of the input C/Si ratio. On the other hand, when the epitaxial growth process operated at too low or too high values of the input C/Si ratio, i.e., outside of the window of good epilayer morphology, any additional increase of the Cl/Si ratio caused improvement of the epilayer morphology. It was established that this improvement was due to a change of the effective C/Si ratio towards its intermediate values, which corresponded to more favorable growth conditions.
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