Materials Science Forum
Vol. 832
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Materials Science Forum
Vols. 830-831
Vols. 830-831
Materials Science Forum
Vols. 828-829
Vols. 828-829
Materials Science Forum
Vol. 827
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Materials Science Forum
Vols. 825-826
Vols. 825-826
Materials Science Forum
Vol. 824
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Materials Science Forum
Vols. 821-823
Vols. 821-823
Materials Science Forum
Vol. 820
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Vol. 819
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Vol. 818
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Vol. 817
Vol. 817
Materials Science Forum
Vol. 816
Vol. 816
Materials Science Forum
Vol. 815
Vol. 815
Materials Science Forum Vols. 821-823
Paper Title Page
Abstract: NO annealed Lateral (11-20) MOSFETs were fabricated and mobility limiting mechanisms were investigated by MOS-gated Hall measurements, impedance analysis of MOS capacitor and so on. We have clarified that about 1×1012 cm-2 of inversion electrons are trapped at the interface and mobility is largely limited by Coulombic scattering. We attribute that the Coulombic scattering is caused by electrons trapped at interface states and positive fixed charges, which might be due to donor-like states.
713
Abstract: In this work, a charge pumping characterization has been carried out on 4H-SiC nMOSFETs built with different SiC doping processes. Because charge pumping (CP) measurements on SiC are complex to implement, three different CP methods have been used for Dit characterization. The impact of geometrical and electrical parameters on each method is studied. Finally, it is detailed the full measurement flow chosen for a deeper and more accurate understanding of Dit electrical characterization.
717
Abstract: We have fabricated the lateral MOSFETs on (11-20) and (1-100) faces and have compared the properties between these faces with various gate oxide processes. It has been demonstrated that (11-20) and (1-100) faces show comparable electrical properties with nitridation treatment on the gate oxide. Our result indicates that both faces exhibit the similar trend of the mobility vs. Dit. Furthermore, it has been shown that NO POA is beneficial to both faces in achieving high channel mobility and suppressed Vt instability.
721
Abstract: We investigated the effect of an Al2O3 insertion layer in the gate insulator to make Vth higher and to improve the transconductance Gm in a SiC-MOSFET. Insertion of the Al2O3 layer successfully enlarged Vth by about 4 V. The Vth difference sub-threshold Id-Vg characteristics measured by sweeping the gate voltage bi-directionally indicates that insertion of the Al2O3 layer decreased the number of traps of electrons in the gate insulator. Due to this decrease, device reliability in long-term operation was improveed by smaller Vth shift in PBTI. It was also found that the insertion of the Al2O3 layer improved Gm by two times. Using this gate insulator, we succeeded in fabricating 600 V 20 A-class vertical SiC DMOSFETs with a high Vth (>5 V) and low Ron of 3 mΩcm2.
725
Abstract: The influences of positive fixed oxide charges and donor-like interface traps on breakdown voltages of SiC devices with FGR and JTE terminations were studied. The breakdown voltages of devices with both FGR and JTE terminations were found to degrade when the level of fixed oxide charges overs 1×1012 cm-2 due to enhancement of junction curvature by fixed oxide charges. The introduction of donor-like interface traps at the interface shows similar behaviors as fixed positive charges, suggested that both fixed oxide charges and interface traps should be taken into account when one optimizes device designs and processes.
729
Abstract: We have fabricated lateral MOSFETs on heteroepitaxial 3C-SiC films included high density of defects. Electrical characteristics of 3C-SiC MOSFETs and their temperature dependence were measured to discuss effects of defects on the electrical characteristics. A field effect mobility of 156 cm2/Vs was obtained at room temperature. After applying a drain voltage of 10 V or higher, the drain current - gate voltage curve shifted toward the positive gate voltage. This shift was caused mainly by the charge trapping in the gate oxide. The light emission was observed on the surface of the active MOSFET. The spatial distribution of the emission light from MOSFETs indicated that the charge was generated at the source edge of the gate channel.
733
Abstract: The effect of bulk potential engineering on the transport properties in the channel of SiC MOSFETs has been studied. For this purpose, n-channel SiC MOSFETs have been manufactured with different background doping concentrations and characterized electrically at room temperature by current-voltage as well as by Hall-effect measurements. To interpret the measurements performed, numerical simulations have been carried out using Sentaurus Device of Synopsys. The main finding of the simulation analysis is that the change in the depth of the band-bending has to be considered to explain the doping dependence of SiC MOSFET characteristics.
737
Abstract: The authors reported the DMOSFETs fabricated on the 4H-SiC(0-33-8) in ECSCRM2012 and the novel V-groove MOSFETs, having (0-33-8) on the trench sidewall in ICSCRM2013. In this paper, we applied both the thick bottom oxide and the buried p+ regions to the V-groove MOSFETs for the protection of the trench bottom oxide. The V-groove MOSFET showed the low specific on-resistance of 3.2 mΩcm2 and the high blocking voltage of 1700 V on the bounty of the high channel mobility and the gate oxide protection, respectively. We also tested the gate oxide reliability of the V-groove MOSFET by constant-voltage stress TDDB measurement. The charge-to-breakdown was 18.0 C/cm2 at room temperature and 4.4 C/cm2 at 145°C. In addition, the stability of the threshold voltage was characterized with the VMOSFETs.
741
Abstract: We have evaluated interface state density (DIT) for EC−ET > 0.00 eV from the subthreshold slope deterioration of MOSFETs at low temperatures. We have compared two n-channel MOSFETs on the C- and a-faces with the gate oxide formed by pyrogenic oxidation followed by annealing in H2. The peak field-effect mobility (µFE,peak) for the C-face MOSFET was 57 cm2V-1s-1 at 300 K, which is lower than the half of 135 cm2V-1s-1 for the a-face MOSFET. We have shown that DIT very close to EC can well explain why µFE for C-face MOSFETs is lower than that for a-face MOSFETs. The value of DIT at 0.00 eV corresponding to the subthreshold slope at 11 K was 1.6×1014 cm-2eV-1 for the C-face MOSFET, which is more than the double of 6.4×1013 cm-2eV-1 for the a-face MOSFET.
745
Abstract: Alkali (Rb, Cs) and alkaline earth elements (Sr, Ba) provide SiO2/SiC interface conditions suitable for obtaining high metal-oxide-semiconductor field-effect-transistor (MOSFET) channel mobility on the 4H-SiC Si-face (0001), without the standard nitric oxide (NO) anneal. The alkali elements Rb and Cs result in field-effect mobility (μFE) values >25 cm2/V.s, and the alkaline earth elements Sr and Ba resulted in higher μFE values of 40 and 85 cm2/V.s, respectively. The Ba-modified MOSFETs show a slight decrease in mobility with heating to 150 °C, as expected when mobility is not interface-trap-limited, but phonon-scattering-limited. The interface state density is lower than that obtained with nitric oxide (NO) passivation. Devices with a Ba interface layer maintain stable mobility and threshold voltage under ±2 MV/cm gate bias stress at 175 °C, indicating no mobile ions.
749