Reliable 4H-SiC MOSFET with High Threshold Voltage by Al2O3-Inserted Gate Insulator

Akio Shima; Kikuo Watanabe; Toshiyuki Mine; Naoki Tega; Hirotaka Hamamura; Yasuhiro Shimamoto

doi:10.4028/www.scientific.net/MSF.821-823.725

Paper Titles

Impact of Nitric Oxide Post Oxidation Anneal on the Bias Temperature Instability and the On-Resistance of 4H-SiC nMOSFETs
p.709

Study of Mobility Limiting Mechanisms in (11-20) 4H-SiC NO Annealed MOSFETs
p.713

Study of Geometrical Effects in Charge Pumping Current for Lateral SiC nMOSFETs Electrical Characterization
p.717

Comparative Study of Characteristics of Lateral MOSFETs Fabricated on 4H-SiC (11-20) and (1-100) Faces
p.721

Reliable 4H-SiC MOSFET with High Threshold Voltage by Al₂O₃-Inserted Gate Insulator
p.725

Effect of Fixed Oxide Charges and Donor-Like Interface Traps on the Breakdown Voltage of SiC Devices with FGR and JTE Terminations
p.729

Electrical Characterization of 3C-SiC Lateral MOSFETs Fabricated on Heteroepitaxial Films Including High Density of Defects
p.733

Effect of Bulk Potential Engineering on the Transport Properties of SiC MOSFETs: Characterization and Interpretation
p.737

Gate Oxide Reliability of 4H-SiC V-Groove Trench MOSFET with Thick Bottom Oxide
p.741

HomeMaterials Science ForumMaterials Science Forum Vols. 821-823Reliable 4H-SiC MOSFET with High Threshold Voltage...

Reliable 4H-SiC MOSFET with High Threshold Voltage by Al₂O₃-Inserted Gate Insulator

Abstract:

We investigated the effect of an Al₂O₃ insertion layer in the gate insulator to make V_th higher and to improve the transconductance G_m in a SiC-MOSFET. Insertion of the Al₂O₃ layer successfully enlarged Vth by about 4 V. The Vth difference sub-threshold Id-Vg characteristics measured by sweeping the gate voltage bi-directionally indicates that insertion of the Al₂O₃ layer decreased the number of traps of electrons in the gate insulator. Due to this decrease, device reliability in long-term operation was improveed by smaller Vth shift in PBTI. It was also found that the insertion of the Al₂O₃ layer improved G_m by two times. Using this gate insulator, we succeeded in fabricating 600 V 20 A-class vertical SiC DMOSFETs with a high Vth (>5 V) and low Ron of 3 mΩcm².

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Periodical:

Materials Science Forum (Volumes 821-823)

Pages:

725-728

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.821-823.725

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Online since:

June 2015

Authors:

Akio Shima*, Kikuo Watanabe, Toshiyuki Mine, Naoki Tega, Hirotaka Hamamura, Yasuhiro Shimamoto

Keywords:

4H-SiC, Al₂O₃, SiC MOSFET, Threshold Voltage Instability, Transconductance

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