Materials Science Forum Vols. 821-823

Abstract: The critical electric field (E_cr) of the gate oxide in 4H-Silicon Carbide (SiC) MOSFETs was measured under inversion bias conditions with ion irradiation. The Linear Energy Transfer (LET) dependence of the E_cr at which the gate oxide breakdown occurred in these MOSFETs was evaluated. The linear relationship between the E_cr^-1 and LET was observed for SiC MOSFETs. The slope of the LET-1/E_cr for SiC MOSFETs is almost the same that of the LET-1/E_cr lines for SiC MOS capacitors. The V_ds dependence of E_cr was also evaluated. The correlation between the direction of electric field of drain-source region and direction of ion incidence affects to instability of E_cr.

Abstract: The stability of the threshold voltage of commercial SiC MOSFETs from two device manufactures has been evaluated and compared when subject to positive and negative bias-temperature-stress conditions. For both device groupings, the worse-case stress occurred under negative bias temperature conditions with V_GS = –15 V and a stress temperature of 200 °C. Devices in the Vendor A grouping exhibited acceleration in their bias-temperature-stress response that occurred earlier in time as a strong function of stress-temperature and to a lesser degree on gate-bias magnitude. Devices in the Vendor B grouping showed some evidence of acceleration, but only for the worse-case stress condition. Threshold voltage shifts for this device group were very low and extremely stable, with recorded values below 0.4 V for most conditions.

Abstract: In this paper, we demonstrate the degradation of commercially available 1.2kV SiC MOSFET bare dies subjected to long periods of isothermal heating at 300°C in air. Periodic electrical measurements indicated an increase in on-state resistance to different extents for three different vendor designs, and the discovery of a progressive rectifying type forward characteristic at low drain-source voltages. Subsequent investigations to determine the cause of the degraded electrical characteristics including sectioning and SEM/TEM analysis revealed some mechanical degradation within the device gate-source cross-sections and backside drain contact metal layers. While one vendor device was severely degraded after approximately 24 hours of heating, another vendor device was only just beginning to degrade after 100 hours, indicating that these devices may be used successfully in real applications at 300°C junction temperatures for relatively long periods.

Abstract: In this work, we investigated the methods that measure the threshold voltage (V_th) instability without relaxation of the gate stress during the V_th measurement. We propose a non-relaxation method that demonstrates exact V_th shifts compared with conventional methods that are not as accurate. In the non-relaxation method, the constant gate-source voltage (V_gs) is continuously applied as a gate stress while the drain voltage (V_ds) shift required to maintain a constant drain current (I_d) is measured. Then, the V_ds shift is converted to a V_th shift. The V_th shift values measured by the non-relaxation method are larger than those measured by the other methods, which means that the non-relaxation method can very accurately measure the V_th shift.

Abstract: In this study, the necessity and beneficial characteristics of SiC power devices for novel power electronic applications are shown from an application point of view. The body diode properties of state of the art 1200 V SiC MOSFETs are discussed and the dependencies of switching speed are derived. Furthermore, the calculation of the fundamental efficiency limit of 99.67 % at the example of a bidirectional DC/DC converter operating at 100 kHz is shown.

Abstract: Lateral MOSFET devices with a thin surface counter-doped layer using Sb and As with and without NO passivation have been fabricated and characterized. The results demonstrate that Sb and As counter-dope the interface without significant trap passivation while in combination with NO there is a superposition of both trap passivation and counter-doping related performance enhancement. In addition, by varying the counter doping level, a universal mobility characteristics of NO passivated devices has been identified.

Abstract: We report here on results obtained using a time-dependent drift-diffusion model to simulate ion transport in the gate oxide of a SiC MOS device during bias-temperature instability measurements to assess the impact on threshold voltage under typical testing conditions. Measured threshold voltage is found to depend strongly on the temperature and mobile ion species, which in combination with the measurement parameters determine how the ions react to the stress and measurement sequence. Simulations show that, based on their mobilities, both potassium-like and copper-like ions may be responsible for experimental observations of a negative trend in threshold instability above 100 °C for SiC MOS devices.

Abstract: A family of planar MOSFETs with voltage ratings from 900 V to 15 kV are demonstrated. This family of planar MOSFETs represents Cree’s next generation MOSFET design and process, in which we continue to refine and evolve device design and processing to further shrink die sizes and enhance device performance. At voltage ratings of 3.3 kV and above, the specific on-resistance of the MOSFETs is approaching the theoretical limit. MOSFET switching performance in a clamped inductive switching circuit for the full range of voltage ratings is also demonstrated. Finally, improved threshold voltage and body diode stability under long-term stresses are presented.

Abstract: Effects of gamma-ray irradiation and subsequent thermal annealing on the characteristics of vertical structure power Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) fabricated on 4H-SiC were studied. After irradiation at 1.2 MGy, the drain current – gate voltage curves of the MOSFETs shifted to the negative voltage side and the leakage drain current at inverse voltage increased. No significant change in the degraded electrical characteristics of SiC MOSFETs was observed by room temperature annealing. The degraded characteristics of SiC MOSFETs began to recover by annealing above 120 °C, and their characteristics reached almost the initial ones by annealing at 360 °C.

Abstract: We study the impact of different nitric oxide (NO) post oxidation annealing (POA) procedures on the on resistance R_on of n-channel MOSFETs and on the threshold voltage shift ∆V_th following positive bias temperature stress (PBTS). All samples were annealed in an NO containing atmosphere at various temperatures and times. A positive stress voltage of 30 V was chosen which corresponds to an electric field of about 4.3 MV/cm. The NO POA causes a decrease in overall ∆V_th for longer NO POA times and higher NO POA temperatures. As opposed to the change in ∆V_th, the device R_on increases with NO POA temperature and time.