Microstructure of Interfacial Basal Plane Dislocations in 4H-SiC Epilayers

Zhe Li; Xuan Zhang; Ze Hong Zhang; Li Guo Zhang; Tao Ju; Bao Shun Zhang

doi:10.4028/www.scientific.net/MSF.954.77

Paper Titles

Electron Mobility due to Surface Roughness Scattering in Depleted GaAs Free-Standing Thin Ribbon
p.51

Measurement of Resistivity of Silicon Carbide by Discharge Time of Equivalent Capacitance of the Sample
p.60

Study of the Growth Temperature Measurement and Control for Silicon Carbide Sublimation
p.65

Phase Control of Ga₂O₃ Thin Films Grown by Metal-Organic Chemical Vapor Deposition
p.72

Microstructure of Interfacial Basal Plane Dislocations in 4H-SiC Epilayers
p.77

Design, Fabrication and Characterization of a 4.5kV / 50A 4H-SiC PiN Rectifiers
p.85

Recent Progress of SiC MOSFET Devices
p.90

Improved Electrical Properties of 4H-SiC MOS Devices with High Temperature Thermal Oxidation
p.99

The Correlation between the Reduction of Interface State Density at the SiO₂/SiC Interface and the NO Post-Oxide-Annealing Conditions
p.104

HomeMaterials Science ForumMaterials Science Forum Vol. 954Microstructure of Interfacial Basal Plane...

Microstructure of Interfacial Basal Plane Dislocations in 4H-SiC Epilayers

Abstract:

As SiC power devices are being developed toward ultrahigh-voltage bipolar structures, the density of basal plane dislocations in SiC epilayers has to be minimized. In this work, a special category of basal plane dislocations, i.e. interfacial dislocations, was investigated. Their etch pits were detected at the interface and the microstructure was revealed by cross-section transmission electron microscope analysis.

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Periodical:

Materials Science Forum (Volume 954)

Pages:

77-81

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.954.77

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Online since:

May 2019

Authors:

Zhe Li, Xuan Zhang*, Ze Hong Zhang, Li Guo Zhang, Tao Ju, Bao Shun Zhang

Keywords:

4H-SiC Epilayers, Basal Plane Dislocations (BPDs), Interfacial Dislocations, Shockley-Type Stacking Fault

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References

[1] T. Kimoto, Material science and device physics in SiC technology for high-voltage power devices, J. J. Appl. Phys. 54 (2015) 040103.

DOI: 10.7567/jjap.54.040103

Google Scholar

[2] H. Fujiwara, H. Naruoka, M. Konishi, K. Hamada, T. Katsuno, T. Ishikawa, Y. Watanabe and T. Endo, Impact of surface morphology above threading dislocations on leakage current in 4H-SiC diodes, Appl. Phys. Lett. 101 (2012) 042104.

DOI: 10.1063/1.4738886

Google Scholar

[3] M. Skowronski and S. Ha, Degradation of hexagonal silicon-carbide-based bipolar devices, J. Appl. Phys. 99 (2006) 011101.

DOI: 10.1063/1.2159578

Google Scholar

[4] A. Agarwal, H. Fatima, S. Haney and S. Ryu, A new degradation mechanism in high-voltage SiC power MOSFETs, IEEE Electron Device Lett. 28 (2007) 587-589.

DOI: 10.1109/led.2007.897861

Google Scholar

[5] Q. Zhang, A. Agarwal, A. Burk, M. O'Loughlin, J. Palmour, R. Stahlbush and C. Scozzie, Influence of Shockley stacking fault generation on electrical behavior of 4H-SiC 10 kV MPS diodes, Mater. Sci. Forum 645-648 (2010) 331-334.

DOI: 10.4028/www.scientific.net/msf.645-648.331

Google Scholar

[6] H. Tsuchida, I. Kamata, T. Miyazawa, M. Ito, X. Zhang and M. Nagano, Recent advances in 4H-SiC epitaxy for high-voltage power devices, Mater. Sci. Semicond. Process. 78 (2018) 2-12.

DOI: 10.1016/j.mssp.2017.11.003

Google Scholar

[7] X. Zhang, M. Skowronski, K.X. Liu, R.E. Stahlbush, J.J. Sumakeris, M.J. Paisley and M.J. O'Loughlin, Glide and multiplication of basal plane dislocations during 4H-SiC Homoepitaxy, J. Appl. Phys. 102 (2007) 093520.

DOI: 10.1063/1.2809343

Google Scholar

[8] M. Nagano, H. Tsuchida, T. Suzuki, T. Hatakeyama, J. Senzaki and K. Fukuda, Annealing induced extended defects in as-grown and ion-implanted 4H-SiC epitaxial layers, J. Appl. Phys. 108 (2010) 013511.

DOI: 10.1063/1.3457840

Google Scholar

[9] X. Zhang, M. Nagano and H. Tsuchida, Correlation between thermal stress and formation of interfacial dislocations during 4H-SiC epitaxy and thermal annealing, Mater. Sci. Forum 679-680 (2010) 306-309.

DOI: 10.4028/www.scientific.net/msf.679-680.306

Google Scholar

[10] X. Zhang, T. Miyazawa and H. Tsuchida, Critical conditions of misfit dislocation formation in 4H-SiC epilayers, Mater. Sci. Forum 717-720 (2012) 313-318.

DOI: 10.4028/www.scientific.net/msf.717-720.313

Google Scholar

[11] S. Ha, H.J. Chung, N.T. Nuhfer and M. Skowronski, Dislocation nucleation in 4H silicon carbide epitaxy, J. Cryst. Growth 262 (2004) 130-138.

DOI: 10.1016/j.jcrysgro.2003.09.054

Google Scholar

[12] S. Ha, M. Skowronski and H. Lendenmann, Nucleation sites of recombination-enhanced stacking fault in silicon carbide p-i-n diodes, J. Appl. Phys. 96 (2004) 393-398.

DOI: 10.1063/1.1756218

Google Scholar