The Correlation between the Reduction of Interface State Density at the SiO₂/SiC Interface and the NO Post-Oxide-Annealing Conditions

Abstract:

We fabricated SiO₂/4H-SiC (0001) MOS capacitors with oxidation temperature at 1350°C, followed by post-oxide-annealing (POA) in NO simply by the control of POA temperatures and times. A correlation between the reduction of interface state density and the increasing of N concentration at the interface has been indicated by C-ψ_s measurement and secondary ion mass spectrometry (SIMS). The SiO₂/4H-SiC interface density decreased when POA temperature was elevated, and the sample annealed at 1300°C for 30min showed the lowest interface state density about 1.5×10¹² cm^-2eV^-1 at E_c-E=0.3 eV when the N concentration is 11.5×10²⁰ cm^-3. Meanwhile, the SiO₂ /4H-SiC interface annealed at 1200°C for 120min showed the highest N concentration at the 4H-SiC/SiO₂ interface is 12.5×10²⁰ cm^-3, whereas the interface state density is 2.5×10¹² cm^-2eV^-1 at E_c-E=0.3 eV higher than 1300°C for 30min. The results suggested that higher temperature POA might be much more efficiency in decreased the 4H-SiC MOS interface density with increasing the N area concentration.

• Periodical: Materials Science Forum (Volume 954)
• Pages: 104-108
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.954.104
• Online since: May 2019
• Authors: Heng Yu Xu*, Cai Ping Wan, Jin Ping Ao
• Keywords: 4H-SiC/SiO₂ Interface, Interface State Density, N Concentration, Post-Oxide-Annealing

References

[1] Hao Yue,Feng Qian,Ma Xiao-Hua, Chinese Physics B,2008,17(4):1405-1409.

[2] Yifan Jia,Hongliang Lv, Yingxi Niu, Chin. Phys. B. 2016, 25(9): 097101.

[3] H. Yoshioka, T. Nakamura, and T. Kimoto, J. Appl. Phys. 112, 024520 (2012).

[4] S. Dhar, S. Haney, L. Cheng, S.-R. Ryu, A. K. Agarwal, L. C. Yu, and K. P. Cheung, J. Appl. Phys. 108, 054509 (2010).mei.

[5] A. Poggi, F. Moscatelli, S. Solmi, A. Armigliato, L. Belsito, and R. Nipoti,J. Appl. Phys. 107, 044506 (2010).

[6] J. Rozen, S. Dhar, M. E. Zvanut, J. R. Williams, and L. C. Feldman,J. Appl. Phys. 105, 124506 (2009).

[7] T. Kimoto, Jpn. J. Appl. Phys. 54, 040103 (2015).

[8] B. J. Baliga, Fundamentals of Power Semiconductor Devices (Springer,Berlin, 2008).

[9] K. Fujihira, Y. Tarui, M. Imaizumi, K. Ohtsuka, T. Takami, T. Shiramizu, K. Kawase, J. Tanimura, and T. Ozeki, Solid-State Electron. 49, 896 (2005).

DOI: 10.1016/j.sse.2004.10.016

[10] K. McDonald, R. A. Weller, S. T. Pantelides, L. C. Feldman, G. Y. Chung, C. C. Tin, and J.R. Williams, J. Appl. Phys. 93, 2719 (2003).

[11] John Rozen, Sarit Dhar, M. E. Zvanut, J. R. Williams, and L. C. Feldman, J. Appl. Phys. 105, 124506 (2009).