Effect of Surface Etching Conditions on Stacking Faults in 4H-SiC Epitaxy

Tawhid Rana; Gil Yong Chung; Steve Anderson; Ian Manning; Willie Bowen; Edward Sanchez

doi:10.4028/www.scientific.net/MSF.963.119

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Basal Plane Dislocation Conversion Enhancement in 4H-SiC Homo-Epitaxial Layers by Ion Implantation into the Wafer
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Effect of HCL on Surface Free Energy of SiC during CVD Trench Filling
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HomeMaterials Science ForumMaterials Science Forum Vol. 963Effect of Surface Etching Conditions on Stacking...

Effect of Surface Etching Conditions on Stacking Faults in 4H-SiC Epitaxy

Abstract:

Epilayers grown on substrates etched by various etching conditions were studied for stacking fault defects. Substrates were etched by H₂, H₂+ HCl and H₂ + C_xH_y gases prior to epilayer growth for comparison. High density of SF was observed in the epilayers when H₂+HCl or H₂+C_xH_y gas mixtures were used. On the other hand, much lower density of stacking faults (SF) (<1 cm^-2) was observed in the epilayer grown on the surface etched by only H₂ gas. However, a high number of pits were generated in the epilayer grown on substrate etched by H₂ only, which can be considered to be tradeoff of achieving low SF in epilayer by substrate etching. We also conclude from our experimental results that C rich surface is more favorable to generate SF in epilayer compared to Si rich surface.

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Materials Science Forum (Volume 963)

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119-122

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https://doi.org/10.4028/www.scientific.net/MSF.963.119

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Online since:

July 2019

Authors:

Tawhid Rana*, Gil Yong Chung, Steve Anderson, Ian Manning, Willie Bowen, Edward Sanchez

Keywords:

Etching, Growth Pits, Silicon Carbide Epitaxy, Stacking Fault, Surface Preparation

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