Bump Formation and Flip Chip Processes for RF System-on-Packages

Boo Yang Jung; Eun Kyoung Choi; Young Soo Jeon; Kwang Yong Lee; Kwang Seok Seo; Tae Sung Oh

doi:10.4028/www.scientific.net/SSP.124-126.25

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HomeSolid State PhenomenaSolid State Phenomena Vols. 124-126Bump Formation and Flip Chip Processes for RF...

Bump Formation and Flip Chip Processes for RF System-on-Packages

Abstract:

For flip-chip process of RF system-on-packages(SOP), double bump bonding processes were investigated. Sn-Ag and Sn solder joints were formed by the reflowed double bumping process, and Sn/In/Sn bump joints were fabricated by the non-reflowed double bump bonding process. The height-to-size ratios of 0.78 and 0.65 were obtained for the reflowed double bumping and the non-reflowed bumping, respectively. Average contact resistance of the reflowed Sn-Ag and Sn solder joints was about 13m/ which was much lower than 24~33m/ of the non-reflowed Sn/In/Sn bump joints. The reflowed solder double bumping method is more suitable for flip-chip process of RF-SOP than the non-reflowed double bump bonding.

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Periodical:

Solid State Phenomena (Volumes 124-126)

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25-28

DOI:

https://doi.org/10.4028/www.scientific.net/SSP.124-126.25

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Online since:

June 2007

Authors:

Boo Yang Jung, Eun Kyoung Choi, Young Soo Jeon, Kwang Yong Lee, Kwang Seok Seo, Tae Sung Oh

Keywords:

Bump, Electronic Package, Flip Chip, RF Package, SOP

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